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TEWS introduces FPGA-based four channel high-speed synchronous/asynchronous serial interface

November 9, 2009

HALSTENBEK, Germany, 9 Nov. 2009. TEWS Technologies introduced a synchronous/asynchronous serial single width / mid-height AMC.1 compliant module with four high speed communication channels. The TAMC863 is designed for data communications, LAN/WAN networking, military communications, traffic control, simulation, and telecommunications applications.

The serial communication controller is implemented in FPGA logic, combined with the bus master capable PCI interface. The FPGA design guarantees long term availability with the option to implement additional application specific functions.

Several serial communication protocols are supported by each channel, such as asynchronous, isochronous, synchronous, and HDLC mode. In addition, a maximum data rate of 10 megabits per second is provided for synchronous protocols and 2 megabits per second is supported for asynchronous protocols.

Multiprotocol transceivers are used for the line interface. The physical interface of each channel can be independently software selected for EIA-232, EIA-422, EIA-449, EIA-530, EIA-530A, V.35, V.36, or X.21.

In order to significantly reduce the processing overhead, the TAMC863 features receive and transmit FIFOs of 512 long words (32 bit) per channel. Data transfer on the PCI bus is handled via TAMC863 initiated DMA cycles with minimum host/CPU intervention. In addition, several interrupt sources can generate interrupts on INTA for each channel, and interrupts may be enabled or disabled separately.

Asynchronous and basic synchronous support for major operating systems such as Windows, Linux, VxWorks, and QNX is available.

The TAMC863 operates in extended temperature range of -40 to 85 degrees Celsius.

For more information, go to www.tews.com.

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