GPGPU processor and 10-Gigabit Ethernet embedded computing boards for radar processing introduced by Mercury

May 26, 2011
CHELMSFORD, Mass., 26 May 2011. Mercury Computer Systems Inc. in Chelmsford, Mass., is introducing a general-purpose graphics processing unit (GPGPU) product based on the NVIDIA Fermi architecture, and a 10 Gigabit Ethernet real-time sensor interface module for radar signal processing applications that must detect and track many small fast-moving targets in harsh operating conditions. These embedded computing products for radar processing are the 6U OpenVPX standard form factor.
CHELMSFORD, Mass., 26 May 2011. Mercury Computer Systems Inc. in Chelmsford, Mass., is introducing a general-purpose graphics processing unit (GPGPU) product based on the NVIDIA Fermi architecture, and a 10 Gigabit Ethernet real-time sensor interface module for radar signal processing applications that must detect and track many small fast-moving targets in harsh operating conditions.These embedded computing products for radar processing are the 6U OpenVPX standard form factor, and can be configured with other components such as Intel rugged processor cards and switch modules as part of larger radar systems.The Mercury (NASDAQ:MRCY) radar Application Ready Subsystems are powered by the Ensemble 6000 Series 6U OpenVPX Intel-based modules with the GSC6200 GPU processing module and the Ensemble IO mezzanine series IOM-200 XMC and IOR-280 RTM building-block modules.

Two NVIDIA GeForce GTX 460M GPGPUs based on the Fermi GPU architecture power the GSC6200, which yields a combined 384 processing cores, 3 gigabytes of solid-state memory and more than 1 teraflop of peak theoretical performance per 6U OpenVPX slot.

It supports the NVIDIA Compute Unified Device Architecture (CUDA), OpenCL, and Mercury's MultiCore Plus MathPack C/C++ software development environments.

Radar signal-processing algorithms, such as adaptive beam-forming, pulse compression, constant false alarm rate (CFAR) and cross correlation run on the GPU. Mercury's board packages the GPGPUs in the MXM form factor to help systems designers validate and deploy current GPGPU technology.

The IOM-200 XMC has four 10-gigabit-per-second Ethernet I/O channels on one XMC card and either an Altera Stratix IV 230 or 360 field-programmable gate array (FPGA) for algorithm partitioning and acceleration.

For more information contact Mercury online at www.mc.com.

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