Half-length PCI Express DSP card with Virtex-6 FPGA introduced by Innovative Integration

Feb. 12, 2012
SIMI VALLEY, Calif., 12 Feb. 2012. Innovative Integration in Simi Valley, Calif., is introducing the PEX6-COP field-programmable gate array (FPGA)-based half-length PCI Express desktop or server coprocessor card featuring the Xilinx Virtex-6 FPGA family for digital signal processing (DSP) applications such as radar, signals intelligence (SIGINT), or wireless communications.

SIMI VALLEY, Calif., 12 Feb. 2012. Innovative Integration in Simi Valley, Calif., is introducing the PEX6-COP field-programmable gate array (FPGA)-based half-length PCI Express desktop or server coprocessor card featuring the Xilinx Virtex-6 FPGA family for digital signal processing (DSP) applications such as radar, signals intelligence (SIGINT), or wireless communications.

The card integrates the computing core via an industry-standard FPGA Mezzanine Card (FMC) I/O module, and the Xilinx FPGA comes in densities to LX550 and SX475, Innovative Integration officials say. The SX475 provides more than 2000 DSP MAC elements operating at clock speeds to 500 MHz. The FPGA core has two 18-megabyte QDRII+ SRAM banks, two 1024-megabyte LPDDR2 DRAM banks, and a 128-megabyte DDR3 bank. Each memory is connected to the FPGA and is independent.

For system communications, the PEX6-COP has a PCI Express and a secondary x4 port. The PCI Express port is a x8, Gen2 interface capable that moves data as quickly as 3 gigabytes per second sustained operation with 4 gigabytes per second burst rate. The secondary port can be used as Aurora ports (x4 to x1), as a second PCI Express x4 port, or using a custom protocol.

A VITA-57 FMC site, which provides configurable I/O for the PEX6-COP supports the connector, with more than 80 LVDS pairs connected to the FPGA and x10 lanes that move data as quickly as 5 gigabits per second per lane. The FMC also adapts to application-specific custom modules.

The card uses less than 15 Watts of power in typical operation. The card is available rated for operating temperatures from -40 to 85 degrees Celsius, and 100 percent humidity with conformal coating.

The FPGA logic can be customized using the Frame Work Logic tool set. The toolset provides support for both MATLAB and RTL designs. The MATLAB BSP supports real-time hardware-in-the-loop development using the graphical, block diagram Simulink environment with Xilinx System Generator. IP cores for a range of signal processing cores for applications such as wireless, RADAR and SIGINT such as DDC, demodulation, and FFT are also available.

Software tools for host development include C++ libraries and drivers for Windows and Linux. Application examples demonstrating the module has are provided. For more information contact Innovative Integration online at www.innovative-dsp.com.

Voice your opinion!

To join the conversation, and become an exclusive member of Military Aerospace, create an account today!