A/D converter and D/A converter engine on 3U OpenVPX card introduced by Curtiss-Wright

June 17, 2013
HIGH WYCOMBE, England, 17 June 2013. Curtiss-Wright Controls Defense Solutions in High Wycombe, England, is introducing the VPX3-530 dual channel A/D converter and D/A converter engine packaged on a 3U OpenVPX card for space-constrained embedded digital receiver applications deployed in harsh defense and aerospace environments.

HIGH WYCOMBE, England, 17 June 2013. Curtiss-Wright Controls Defense Solutions in High Wycombe, England, is introducing the VPX3-530 dual channel A/D converter and D/A converter embedded computing engine packaged on a 3U OpenVPX card for space-constrained embedded digital receiver applications deployed in harsh defense and aerospace environments.

The VPX3-530 combines two channels of 4-gigasample-per-second 12-bit A/D conversion and two channels of 14-bit D/A conversion for applications like base stations, signals intelligence, electronic intelligent, software-defined radio, radar warning receivers, and electronic countermeasures radar.

The card has a user-programmable Xilinx Virtex-7 field-programmable gate array (FPGA) to couple the A/D converter and D/A converter channels for low latency between inputs and outputs.

The VPX3-530 combines multi-channel high-speed A/D converters and D/A converters in a range of rugged build formats. The board supports as many as four analog inputs, which can be configured as dual 4-gigasample-per-second/12-bit or four 2-gigasample-per-second/12-bit channels.

Each analog input is AC coupled via baluns for maximum A/D converter performance. The analog inputs are complemented with two 5.6-gigasample-per-second 14-bit D/A converters.

The board's FPGA is supported by two high speed DDR3L memory resources, and its configuration images can be stored in either the flash memory or DDR SDRAM configuration memory and can be updated by the host CPU using the PCI Express interface.

The DDR DRAM resource enables configurations to be downloaded from the host and bypass the non-volatile flash. Because SDRAM-based configuration is volatile, it is for security sensitive applications and allows the VPX3-530 to be more easily declassified should the need arise.

The VPX3-530 provides the choice of two RF sample clock sources through the front panel. Modes are supported that allow synchronous A/D converter and D/A converter data sampling or independent sample clock for the A/D converters and D/A converters.

This allows coherent input and output sampling or the ability to operate the A/D converters and D/A converters separately. To deliver maximum performance the VPX3-530 uses an external clock source instead of a local sample clock.

For more information contact Curtiss-Wright Controls Defense Solutions online at www.cwcdefense.com.

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