Army eyes breakthroughs in infrared sensors with 3D ROIC for cooled dual-band IR arrays

July 15, 2013
FORT BELVOIR, Va., 15 July 2013. U.S. Army researchers are surveying industry to find companies able to push infrared sensor technology forward by designing 3D readout integrated circuit (ROIC) technology for infrared focal plane arrays (IRFPAs).

FORT BELVOIR, Va., 15 July 2013. U.S. Army researchers are surveying industry to find companies able to push infrared sensor technology forward by designing 3D readout integrated circuit (ROIC) for infrared focal plane array (IRFPA) technology.

Officials of the Army Contracting Command, on behalf of the Army Research Development and Engineering Command (RDECOM), Communications and Electronics Research and Development Engineering Center (CERDEC), Night Vision Electronics Sensors Directorate (NVESD) at Fort Belvoir, Va., have issued a source-sought notice (W909MY-13-Q-ROIC) for the 3D Readout Integrated Circuit for Infrared Focal Plan Array program.

This project seeks to advance current infrared technology by developing a 3D ROIC architecture suitable for large-format, small-pixel, high-performance cooled dual-band IRFPAs.

Conventional ROIC approaches have limited data-rate and dynamic-range capabilities, and most of today's ROICs are analog with the integration capacitor taking up most of pixel area, Army researchers say.

The challenge for current ROIC technology is how to implement sufficient well capacity in small pixel pitch to meet sensitivity and dynamic range requirements.

Companies interested should submit technical solutions for a 3D ROIC architecture with a large-format, small pixel pitch readout with high injection efficiency, low noise, low power dissipation, and A/D conversion on-chip with greater than 20 bits of dynamic range.

3D integrated circuit integration is proliferating quickly in the commercial silicon industry as a way to continue to increase performance. 3D chip stacking ICs are made possible through advances in the through silicon via (TSV) technology, deep silicon via (DSV) technology, combined with the wafer thinning and wafer bonding technology.

In addition to the Army's interest in a 3D ROIC, researchers also would like to develop a producible, affordable path to 3D ROICs, researchers say.

Companies interested should email white papers no longer than 15 pages describing their capabilities and 3D ROIC concepts no later than 9 Aug. 2013 to The Army's Michelle Hodges at [email protected], with a copy to Khoa Dang at [email protected].

Put W909MY-13-Q-ROIC, Market Research Response, Your Company's Name, in the subject line. Email questions or concerns to Michelle Hodges or Khoa Dang at the email addresses above.

More information is online at https://www.fbo.gov/notices/8e0165135ff201f1570a968d6598646d.

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