By BEN AMES
Die-hard proponents insist the dedicated digital signal processor will live forever, but general-purpose processors and programmable hardware are increasingly the choices of high-end systems designers.
Digital signal processors (DSPs) have long been the best way to handle the data demands of radar, sonar, and digital radio. But engineers today often use dedicated DSPs in just a supporting role, or even leave them out altogether, as advances in PowerPC microprocessors and field-programmable gate arrays (FPGAs) make up for drawbacks in speed, cost, and complexity.
"FPGAs are becoming a more important part of systems at the front end, and AltiVec at the back end," for signal and image processing jobs, says Richard Jaenicke, director of product marketing for Mercury Computer Systems in Chelmsford, Mass.
FPGAs are more expensive and difficult to program than DSPs, but in certain applications, they can be much faster. Likewise, PowerPCs such as Motorola's AltiVec use the easily-to-program C language, but have not been as fast as DSPs until now.
The switch to FPGAs can improve performance dramatically. In medical imaging, for example, engineers form three-dimensional images from a collection of two-dimensional CAT scans. In the past, machine designers used the AltiVec G4 microprocessor because it is simpler to program than a DSP. Today, however, designers are considering FPGAs for the job because these devices can do the job 40 times faster than the AltiVec, Jaenicke says. Even at 10 times the cost, that still delivers performance that is four times better. Mercury hasn't yet found such a leap in military applications, but has built some systems that work 10 or 20 times faster, he says.
Another reason to use the FPGA is the increasing productivity of programming tools. "The development effort still takes more than DSP, but it is a long way from being as work-intensive as an ASIC [application specific integrated circuit]," Jaenicke says.
The bottom line: FPGAs are good for applications where they sit on the front end, quickly doing compute-intensive work with simple algorithms.
That is not entirely new; people have recently been using FPGAs in the front end, with an analog/digital converter, doing a little bit of signal processing or filtering, Jaenicke says. But the latest generation of FPGA is bigger. "Now we're talking about a large, 6 million gate range (as opposed to the usual 1 million gates), so they're handling an actual heavy computational load."
That advance means the FPGA can take over some traditional DSP applications, such as a big military radar. "Before, you had to do the beam forming in analog; now you can do it in digital, and handle the data pipe with an FPGA, not just pulse compression. That enables the digital domain to get closer to the sensor, which boosts the signal to noise ratio," Jaenicke explains.
Mercury does three main applications: military (radar, signal intelligence, sonar, signal processing); medical imaging (CAT scan, MRI, digital X-ray); and semiconductor imaging (wafer inspection, photomask generation). It is also now doing some homeland security applications, such as baggage inspection.
But DSPs will never go away, predicts Manuel Uhm, senior manager of strategic marketing at Spectrum Signal Processing in Burnaby, British Columbia. Dedicated DSPs, Uhm claims, still perform certain tasks better than anything else. Engineers will increasingly play to the strong suit of each type of processor, building hybrid combinations. That kind of heterogeneous design is the only way to handle the real-time signal processing demands of military applications.
"In the signal-processing space, the choices used to be well-defined between FPGAs, ASICS, and DSPs," Uhm says. "Now it is grayer, because of Moore's Law and the increased functionality."
Moore's Law is the dictum from Intel co-founder Gordon Moore that the number of transistors on a chip will double every two years, making computing power faster and cheaper. His prediction has held true since 1965, but most developers agree it will run afoul of the laws of physics within the next decade.
In the meantime, Moore's Law is continuing to change the DSP landscape. "For example, FPGAs couldn't do digital signal processing two years ago," Uhm says. Neither could general-purpose processors, until Motorola launched its AltiVec engine (in 1998). "Now the developer has more options, which can be confusing."
The answer is heterogeneous processing, he says. For instance, designers need the parallel-processing ability of FPGAs for wideband radio (on the front end), but also need relatively inexpensive DSPs for baseband processing (on the back end), Uhm says.
The advantage of this approach is modularity and scalability, since heterogeneous processing can accommodate any configuration, and enables the engineer to optimize the cost and performance of his design.
From the designer's point of view, the general-purpose processor is a favorite tool, since experts can program it with the widely used C or C++ languages. Those general-purpose processors — now in their fourth generation, or G4 — hitherto had never been fast enough to compete with DSPs. But a combination of Moore's Law and their ease of programming changed all that.
"People keep anticipating that AltiVec will taper off ... but now Motorola is reinvigorating its AltiVec line with the G4-plus architecture, giving it a whole new life cycle," Jaenicke says.
Motorola engineers originally designed the chip for multimedia and Macintosh desktop computers, not embedded applications. But thanks to the G4, AltiVec has come to dominate high-end floating-point operations, such as telecommunications, he says.
Ian Stalker, DSP product marketing manager at Dy4 Systems in Kanata, Ontario, agrees that the PowerPC will continue to outlive its critics.
"One reason the PowerPC is so successful is that it is such a good general-purpose processor, so there are many people developing tools for it," he says. "A developer has a huge range of tools at his disposal. Pure DSPs are more of a boutique solution."
But he's skeptical about widespread use of FPGA, because these devices are missing that ease of use. "Tool boxes for DSPs and PowerPCs — compilers, debuggers, operating systems — are very mature, with lots of choices. But that's not true for FPGAs, so we'll see more esoteric users adopting them first."
FPGAs will slowly get easier to use, but in the meantime, they'll replace DSPs only when performance is crucial, Stalker says. "A nascent trend is customers planning to use FPGAs as part of the computing, as actual DSP elements. Performance can often be quite dramatically improved, even though FPGAs are more expensive, and demand more significant engineering to do in hardware."
In the meantime, PowerPCs will continue to improve. "We don't see an end in sight for the continued dominance of the PowerPC," Stalker says. The Motorola roadmap for new generations will continue to create new embedded processors. And users will increasingly upgrade their older systems, still running on outdated Analog Devices Sharc and Texas Instruments C40 DSPs.
Still, heterogeneous digital signal processing is here to stay, says Rodger Hosking, vice president of Pentek Inc. in Upper Saddle River, N.J. He cites one reason: brute force.
An FPGA can do amazing things, he says. A G4 PowerPC or TI C6000 has two or four multipliers. "But digital signal processing needs multipliers; the Vertex 2 FPGA [from Xilinx Inc. in San Jose, Calif.] has 96 multipliers and lots of gates; so you can do in one clock cycle on the FPGA what takes many on others. And you can do things in parallel on FPGA things you had to do sequentially on the others."
Pentek's Model 4205 is a Fibre Channel VME board that offers I/O and real-time processing options. It is shown here with a VIM-2 and PMC module installed.
That means some applications will run 10 times faster on an FPGA than on a G4 PowerPC. "So compare the cost of the FPGA to supporting, nurturing, and feeding 10 DSPs," Hosking says. "It's a no-brainer in every sense; power, space, and cost." The major drawback is still ease of use, he admits. "Programming
FPGAs is not as easy as programming PowerPCs; you're not writing a C program, you're actually creating hardware."
But Pentek has an answer — Gateflow. Released in February, it is a toolkit for easing the pain of programming FPGAs. It offers three options. First is the Gateflow FPGA design kit, which extends FPGA applications on standard Pentek products with standard design tools, enabling designers add their own custom code. Second is the Gateflow Intellectual Property Libraries, for fast Fourier transforms (FFTs) and two digital receiver cores. FFTs represent a class of algorithms that break complex signals into their elementary components. Third is the Gateflow factory installed cores, which Pentek experts install for the customer who does not want to do integration work.
Another new industry trend to ease FPGA programming is shared designs. Third-party core vendors can put their designs on websites of FPGA-makers Xilinx or Altera Corp. in San Jose, Calif. "So now the first thing you do is go up and see 'Well, has somebody done this before?'" he says.
A third option is to use development tools like MatLab and Simulink, popular simulation and math tools from The Mathworks of Natick, Mass.
"The simulators FPGA vendors are offering are getting better and better; it makes it faster and cheaper than downloading your design onto a physical part to test it," Hosking says. "It is really kind of a brave new world; because it changes the way we design our products."
But the praise is not unanimous. Designers should not get carried away with FPGAs, says Vincent Chuffart, product manager at Thales Computers in Raleigh, N.C.
"Traditionally there's been a tradeoff between an aggressive ratio of computing power versus cost and heat," he says. Designers could boost efficiency with dedicated hardware, but the might loose flexibility, so the best solution depends on the application.
The PowerPC opened a whole new era, since it enabled engineers to use software, not hardware, for large computing jobs. "They discovered they could do more with a PowerPC with AltiVec than a traditional DSP, because it allowed an adaptive, flexible computing platform," Chuffart says.
Now the FPGA is sending similar shock waves through the field, but engineers are still wary, he says. "FPGA is a new thing, as the AltiVec G4 was two years ago. As a newcomer, it creates a lot of FUD (fear, uncertainty, and doubt) for designers."
Some designers complain that FPGAs are not as versatile as the PowerPC. Once modified, they contend, the FPGA is tough to change again.
The Dy 4 Systems CHAMP-AV II Quad PowerPC DSP board is shown here in its conduction cooled form with a StarLink Switched Interconnect PMC.
Another drawback is the FPGA's inability to share data well. While the FPGA might be good for applications like radar, sonar, medical, and baggage scanning, "if you need a feedback loop, like steering an anti-missile to a missile, then it is very difficult. It is possible but complex for an FPGA to manage a shared data flow."
Still, the newcomer has its place. The FPGA is best suited to the efficient end of the system, closest to the sensors, Chuffart says. FPGAs are good for handling FFTs. And these devices also work well as a data path processor — an intelligent pipe that moves and massages data.
But do not push the envelope too hard, experts warn. Chips can overheat, just as cars do. Try to push chips too hard, and designers may find their performance will suffer, or the machine could even break down. Yet designers are constantly cramming more transistors on every chip, and shrinking the package size. In the face of such challenges, "DSPs are holding the line, while PowerPCs and FPGAs are creeping up," Jaenicke says.
However, each generation improves heat-sink technology a bit, as they get more clever with materials and design. Also, the performance of PowerPCs and FPGAs has risen so fast lately that designers can get away with using fewer chips, which reduces heat in the overall system.
In small, lightweight, and portable applications, success comes with heat reduction, agrees Stuart Heptonstall, product marketing manger for DSP products at Radstone Technology in Towcester, England. "We fight to balance increased clock speeds with better cooling," Heptonstall says.
Power dissipation is coming down slightly, though not as much as Heptonstall would like, he admits. Fortunately, the clock speed on each chip is getting much higher, which allows designers to use fewer chips and lower voltage.
Those are crucial variables for Radstone's customers who are trying to build systems for radar, sonar, real-time signal processing, and electronic signals surveillance. That last segment is particularly important for new applications in homeland security, since signals intelligence systems must scan a wide bandwidth of frequencies, then narrow in on the band with activity. "That's difficult for DSPs to do, but much easier for FPGAs," Heptonstall says.
Radstone's designers tend to place an FPGA at the front end of the system, where they need to fine-tune filtering and sensitivity so they can do the fast-math on raw data. They use dedicated G4 PowerPCs to handle the tricky algorithms at the back end.
Dy4 engineers take pride in managing heat on their company's boards. The Dy4 conduction-cooled DSP systems are designed for rugged applications such as underwater or airborne, Stalker says. That also allows the systems to handle temperature and shock extremes well.
Another major driver for DSPs is efficiency, particularly in applications for aerospace and mobile computing. For instance, a manned portable application in signals intelligence demands high power and low weight, so a soldier can carry it.
Driving demand in this area are two major programs for military communications and signals intelligence, says Spectrum Signal's Uhm.
JTRS, the joint tactical radio system, is a set of next-generation military tactical radios. They are designed to be completely interoperable, so the Army and Navy can coordinate strikes, for example.
WIN-T is the warfighter information network-tactical, which is to replace the existing communications infrastructure, which is a diverse collection of platforms for ships, jet fighters, surveillance aircraft, and other platforms. JTRS and WIN-T must perform hard-real-time computing, and must satisfy demands for four clusters of users: vehicular, man-packs, shipborne, and airborne.
Another challenging application for DSPs is the UAV (unmanned aerial vehicle) because each unit is power-constrained: the less power it consumers, the longer it can stay in the air.
"You'd use primarily DSPs for that job because they offer the best ratio of processing power to power drain. Each DSP uses 1 to 1.5 watts, compared to a PowerPC which uses 10 to 15 watts," Uhm says. "So you'd start with DSPs, then use FPGA in the front-end, and use a PowerPC as embedded control."
The airplane-size Global Hawk UAV uses "lots of PowerPC G4, 9U VME boards," while the much smaller Predator model uses a 6U VME, Uhm says.
Another major driver in the DSP marketplace is cost, points out Wallace Scott, strategic marketing manager for military DSPs at Texas Instruments in Sherman, Texas.
Designers continue to demand hermetically sealed DSPs in ceramic packages, according to a TI customer survey done in mid-2002. These stoutly packaged DSPs are crucial for rugged applications that must handle vibration, humidity, and heat.
Until now, it has been very expensive for third-party vendors to seal DSPs to military specifications. But there is a recent move toward commercial off-the-shelf, plastic encapsulated microcircuits — COTS-PEMs, for short — to achieve that at low cost.
Texas Instruments is meeting that demand with a new line of chips titled EP (enhanced plastic). Sealing a chip with plastic instead of ceramic allows three benefits: lower cost, lower weight, and newer technologies (since plastic versions can be produced much faster).
But all these advances create a problem — processors are getting so fast, it is tough to keep them fed with new data, Jaenicke says.
One solution to this bottleneck is to use high-speed serial switched network fabrics connected through the chips' backplanes. Previously used only for high-end digital signal processing, switched fabrics will soon become more pervasive, he says.
The benefit of choosing a switch fabric for a backplane is speed. This approach helps designers avoid putting processors in a pipeline, and helps systems integrators connect them to work in parallel. For example, an FPGA might need a bit of input from several sources to perform its algorithm; yet designers do not know which bank will be ready first. Switch fabric facilitates that flexibility.
Uhm says he agrees — no processor is an island. They must be fed by a strong communications interconnect.
Spectrum targets two market segments; wireless infrastructure and packet voice infrastructure. Some of the heaviest processing happens on the wireless side, with applications in C4ISR (command, control, communications, computers, intelligence, surveillance, and reconnaissance). In English, that means they make boards for spectrum-monitoring, and signal collection, interception, and analysis, and software-defined radio platforms (such as Spectrum's SDR3000)
Of course, designers must link all those processors to each other and to the backplane. The designer's choice depends on optimizing: Spectrum uses Serial RapidIO for point-to-point interconnects, a switch fabric that acts as a big pipe to move data from processor to processor. Other options are switched Ethernet over the backplane, or PCI for local buses onboard. Integrators must choose communications methods depending on the part of the algorithm they are executing, Uhm says.
Stalker at Dy4 says he agrees: "The trend getting the most talk around the water cooler is the ongoing fabric wars, the competition for who gets to build the connection between the processor boards. They are now boiling down from around 25 technologies a year ago, to just a few today."
There is a lot at stake; designers could build next-generation systems with this technology, connecting several different DSPs for high-end sonar and radar, he says.
"Most of our customers are in the floating-point domain; radar, sonar, signal intelligence, electronic warfare, anything where they're looking at radio frequency and doing something about it," Stalker says. "They're also doing image processing with FLIR sensors, target tracking, or cruise missiles."
Dy4's answer to the challenge is Star Fabric, a non-proprietary interconnect that began shipping in June. "But for the time being, VME is still dominant for us," he says.
Pentek's Hosking also says he agrees. "Switch fabric's going to be the next major wave of embedded system connectivity. It's going to be an exciting time; everyone's waiting to see who will be the winner," he says.
Thales Computer's V4G4c is a Quad PowerPC (G4) VME that supports VME 2eSST and is designed for high-performance real-time data and signal processing.
Pentek designers at one time primarily used dedicated DSPs from Texas Instruments, but in the past three years have added PowerPC to their arsenal, Hosking says. That is because they needed a tool to provide high-performance I/O for their software radio products, designed to process or sample wideband radio, acoustics, or sonar.
On a higher level, experts at Sky Computers in Chelmsford, Mass., voted with their feet.
Sky's new SMART System Architecture is a hardware and software platform based on open-source standards; it is designed to enable quick development and highly available applications. The family includes two blade server computers — the SMARTpac 500 data acquisition server, with an 800 MHz AltiVec Motorola Power PC, and the SMARTpac 1200 compute server with a 1 GHz AltiVec Motorola Power PC.
"We used to have to create our own fabrics and code libraries to do this, but today there's a big opportunity to leverage standards and open-source code to achieve the same thing," says Mark Pacelle, vice president of marketing for Sky. "The smartest decision a developer can make in creating code is to leverage standards."
The new platform will enable "highly available" applications that can modify themselves to route around problems.
If the fan breaks down in a highly available system, it will not overheat, though it may run a lot more slowly. It does that by routing traffic around the problem area with a self-reliant, self-repairing interconnect fabric. "It will keep the system up even if it is in a degenerated state," Pacelle says. SMART stands for standards-based, manageable, adaptable, real-time.