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DSP RTOS supports Freescale’s MSC8144 multicore digital signal processor

July 1, 2006

Enea in Stockholm, Sweden, is offering its OSEck real-time operating system (RTOS) for Freescale’s MSC8144 multicore digital signal processor. The OSEck RTOS, optimized for signal-processing applications, takes advantage of the MSC8144’s multicore architecture and high-speed packet processing capabilities. OSEck also provides high-performance message-based LINX interprocess communications (IPC) services, which greatly simplify the design of complex telecom infrastructure applications spanning multiple MSC8144 cores and processors. The MSC8144 is a high-performance, TCP/IP-enabled, multicore device for network communication infrastructure devices such as 3G and WiMAX radio base stations, radio network controllers, voice and video media gateways. Delivering a peak performance of up to 16 billion multiply-accumulate operations (16 x 16) per second, the MSC8144 integrates four high-performance SC3400 DSP subsystems based on StarCore technology. Each core is equipped with a hardware memory management unit, 16 kilobytes instruction cache, and 32 kilobytes of data cache. The MSC8144’s dual RISC-based QUICC Engine technology supports dual Gigabit Ethernet and ATM interfaces, which offload the DSP cores by handling network protocol processing. The MSC8144 also features 128 kilobytes of shared L2 cache, 512 kilobytes of shared M2 SRAM, 10 Mbytes of shared M3 memory, a 200-MHz DDR DRAM controller, eight 256-bidirectional TDM channels, a PCI interface, and a Serial RapidIO interface. For more information contact Enea online at www.enea.com.

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