By John Keller
The latest field-programmable gate arrays (FPGAs) for military and aerospace applications are larger and more complex than they have ever been before, which is putting increasing pressure on vendors of FPGA programming tools that bring out all the performance that these devices were designed to offer.
No matter the kinds of advanced innovations that FPGA tools manufactures come up with, systems designers and FPGA programmers always want more-better code efficiency, higher levels of abstraction, better debugging, and ever more tightly integrated tool suites.
“The overall trend that people want to see is better efficiency and performance from working at higher levels,” explains Rodger Hosking, vice president of Pentek Inc. in Upper Saddle River, N.J.
“That goal is working at higher levels of abstraction in terms of signal processing or control task for implementing FPGA functions. This is the dream and the vision that all the tool companies are promising.”
Pentek is an advanced signal-processing company that specializes in software-defined radio for military and other government applications. Company engineers are implementing complex signal processing and RF algorithms in FPGAs for a growing number of applications.
Systems designers, Hosking says, “want to, say, take a C program and convert it into highly efficient FPGA code, and in a couple of hours be off and running.”
That goal, Hosking points out, has yet to be achieved, yet FPGA tool companies are working at making that goal a reality-eventually. Until that happens, Hosking recommends several areas in which FPGA tools vendors might better serve engineers at Pentek and other FPGA implementers.
“One issue constantly bugging us is changes in the revision levels of the development tools for FPGA design, such as the Xilinx ISE tools,” Hosking says. “What happens is every time they come up with a new revision, our IP cores and design kits and libraries may no longer work, or may not work the same way. If I completed a project a year ago and got the FPGA working perfectly, I may recompile it on my new version of the tools and get errors, things that don’t work anymore, or different optimization techniques, and that causes problems.”
Other FPGA implementers also have ideas about changes they most need for programming and development tools.
“The three biggest challenges for FPGA designers are timing closure, coding efficiency, and verification,” says Dennis Smetana, product development manager for the CHAMP-FX product at Curtiss Wright Controls Embedded Computing in Leesburg, Va.
“There is a need to be able to design in a hierarchical fashion, not only at an RTL level, but also to be able to preserve placement and routing information once a block is completed,” Smetana says. “Tools are starting to come out to address this issue providing more advanced floor planning capabilities, and I see an increased focus in this area. This is also key to the more efficient use of reuse-IP which is required for quicker time to market.”
Click here to download a .PDF of FPGA programming tools.
