I wonder who remembers the days when military high-performance embedded computing (HPEC) involved PowerPC microprocessors with Alti-Vec technology, or before that the Intel i860 digital signal processor.
Anyone? (crickets) Anyone at all?
Well, my point is we've come a long way since the i860 and AltiVec, driven by new central processing unit (CPU) technologies like the latest-generation Intel Core i7, field-programmable gate arrays (FPGAs) from manufacturers like Xilinx, Altera, and Microsemi, and general-purpose graphics processing unit (GPGPU) technologies from NVIDIA and AMD.
I remember long enough ago when one of the fondest computer science goals of the Defense Advanced Research Projects Agency (DARPA) was to create "a gigaflop in a soup can." Today we're doing that on a chip, we're approaching a teraflop on a chip, and there doesn't seem to be any end in sight.
GPGPU technology-which is a massively parallel processing architecture that lends itself well to floating-point digital signal processing-continues to evolve on a trajectory similar to what we've known as Moore's Law, and GPGPU software programming tools are making this technology broadly available. FPGA devices and software programming tools are improving apace.
DARPA launched the ICECool program, short for Intrachip/Interchip Enhanced Cooling, which promises to fabricate in-device liquid cooling as part of the semiconductor manufacturing process. ICECool, now aimed primarily at embedded computing and RF monolithic microwave integrated circuit (MMIC) power amplifiers, seeks to remove waste heat from electronic components at the rate of one kilowatt per square centimeter heat flux, and one kilowatt per cubic centimeter heat density.
DARPA's involvement in HPEC extends much farther than the ICECool program. Last fall, the agency awarded research contracts to SRI International in Princeton, N.J., and Reservoir Labs Inc. in New York for the Power Efficiency Revolution For Embedded Computing Technologies (PERFECT) program, to overcome power efficiency barriers that limit the capabilities of military embedded systems.
The DARPA PERFECT program aims to increase the power efficiency of HPEC systems from 1 billion floating point operations per second per watt (GFLOPS/w) to 75 GFLOPS/w. Imagine the kind of embedded computing capability these technologies could yield if they ever come to pass. Military intelligence, surveillance, and reconnaissance (ISR) experts complain that today's data processing capability and thirst for ISR information leaves us "swimming in sensors, and drowning in data."
The issue isn't so much a problem of too much data, as it is too much superfluous data. Sensors are everywhere churning out oceans of data. There aren't enough processors or human analysts to keep up-today that is. But just take a look at GPGPU technology. This processing approach began life as a high-performance graphics engine aimed at high-end gaming. It didn't take long for the embedded computing community to catch on that GPGPUs were high-performance parallel processors applicable to DSP applications like radar and sonar processing, electronic warfare, and signals intelligence.
One expert explains that graphics processors are particularly good at combining lots of data into a coherent picture. The graphics capability of GPGPUs also are extremely good at taking apart complex pictures, boiling them down only to the information that's needed.
But there's one thing that bugs me about GPGPU technology: its crummy name. I'm proposing a new name: high-performance embedded parallel processing (HPEPP). Give it some thought; it just might catch on.