Military applications that rely on small size, weight, and power consumption (SWaP) such as unmanned vehicles, soldier-worn electronics, and battlefield networking are reaping the benefits of reconfiguring boards into systems on chip (SoC).
By J.R. Wilson
The evolution of small-form-factor (SFF) embedded computing has been so rapid and its impact on design and system capabilities so extensive that it may take years for design engineers and military applications designers to integrate current state-of-the-art system-on-chip (SoC) technologies.
"[This ongoing evolution] is causing a big, big shift in the way designers approach these systems," says Luc Langlois, director of global technology marketing at Avnet Electronics Marketing in Phoenix. "Essentially, we're seeing the boundaries between traditional software and hardware design slowly erode or blur. For example, when dealing with a part that has some embedded processors and programmable logic, there is the possibility of creating an accelerator. Think of software as executing a task sequentially. In programmable logic, you can massively parallelize these operations, which is where you get the performance."
It comes down to software experts designing hardware. "So now you have software designers able to design hardware-based accelerators on the same chip that sends data into the programmable logic, where you can get an acceleration of that instruction up to 100x," Langlois says. "That's a challenge for designers because now you have to learn a lot of different skills. The advantage is you have years and years of legacy software algorithms you can tap into and still get the acceleration in programmable logic by having a single chip. All that is now in the SoC and all the related flows are essential to unlocking the technologies in those SoCs."
As with much military technology in the past few decades, SoC came out of the commercial world, primarily pushed by the cellular market and, more recently, development of the Internet of Things (IoT). The first made it ideal for military communications systems with fewer components, smaller mechanical parts, less weight, less heat dissipation, and lower cost.
Demand for customization
Developments by the major chip manufacturers enabled defense contractors to use single processors rather than multiple components. Their primary challenge is to meet high user demand for customization in products produced in the thousands rather than millions. That volume - and the speed of evolution in chip technology - make it impractical, if not financially impossible, to build their own chips. As a result, contractors must take what's available in the commercial market that enables compliance with the standards of the military market.
The new small footprint Embedded G-Series SoC from Advanced Micro Devices (AMD) in Sunnyvale, Calif., for example, combines a low- power x86 microprocessor with an integrated discrete-class graphics- processing unit (GPU) and I/O controller and enterprise-class error- correction code (ECC) memory support on a single chip, in dual and quad core variants. The result, the company says, is "an exceptional HD multimedia experience and a heterogeneous computing platform for parallel processing... [setting] the new foundation for a power-efficient platform for content-rich multimedia and workload processing well suited for a broad variety of embedded applications."
Taiwan-based NEXCOM International maintains the combined demands of IoT, cloud computing, and expanded network communication have pushed the evolution of traditional embedded devices, transforming them into intelligent systems that are gradually becoming adopted and deployed for both commercial and military applications.
"In the era of specialized knowledge economy, the challenge of integrating multiple silicon intellectual property (SIP) cores requires complex verification of various elements, from SoC processors, firmware, drivers to operating system kernels," according to a NEXCOM white paper. "Therefore, a highly integrated SoC module, comprising both hardware and software elements, is a shortcut to reducing the development life cycle of SoC solution and time-to-market."
At a 2014 Embedded Systems Engineering panel on the evolution of SoCs, Dan Demers, director of marketing-Americas for Congatec Inc. in San Diego, said one of the most important effects of the SoC concept is the ability it gives to developers of small-form-factor board and modules to consider future standards that further reduce overall size.
Considering future standards
"The real-estate savings that are found with SoCs are pretty considerable when we note that not too many years ago it took many chips to equal the benefits of these SoCs," Demers told the panel. "Another benefit to SoCs is that many also realize a power savings, which in turn helps to fuel further development on more powerful, yet less power-hungry, devices.
"Today's SoCs are getting a lot of accolades for their relative high capabilities for image processing, which is opening the door to many new applications," Demers continued. "When you step back and look at what the latest Intel and AMD SoCs offer, it is quite amazing. We are realizing silicon platforms that are both today- and tomorrow-focused. They contain relative high computational capability and a lot of flexibility for the board/module designer and, of course, the overall system design engineer." As SoCs continue to evolve, he added, designers will look to new ways to use their smaller size on current and future form factors.
"SoC is always improving," notes Zak Sucher, business development manager at Israel's Techaya. "In every generation, we are managing to squeeze more applications on a single chip, so today we can use one or two chips where we once used three or four. It is going toward eventually taking over all previous platforms, but the military market moves slower; you can still find things today that were in use 10 or 15 years ago and what's being done today will still be there 10 or 15 years forward.
"We see them on soldier apps, where everything he carries needs to be small and provide a lot of comms to other devices; the same for UAVs [unmanned aerial vehicles], where you need low power consumption, small units, and interconnectivity," Sucher says. "So all soldiers and unmanned applications are the major users. A soldier can only carry a certain amount of equipment and every gram of equipment he can remove means he can carry more food, water, or ammo. So the lighter the radio and other equipment, the more essential items he can carry."
Shift to multifunction capability
While size, weight, and power (SWaP) and component integration are and always will be primary drivers for commercial and military platforms, a major shift toward software is giving multifunction capability to more and smaller systems. Becoming software-defined also enables faster and less expensive updating of capabilities without needing to change the hardware with each incremental advance, a critical factor for SoC-based military systems that do not change with the frequency of commercial smartphones.
"What has driven all this is the need to integrate all these functions and the really wideband apps, such as electronic warfare [EW]. So it's a combination of more bandwidth and the [system] intelligence to run some software apps inside these embedded processors," says Avnet's Langlois. "EW, for example, is all about dominating the RF spectrum for jamming while receiving your own communications in the clear across an ultra-wideband past 200 GHz. So traditional programmable logic, even before SoCs, continue to play a role because they are the only devices that can interface with these high-speed components, as they have for the past 20 years."
Just as the demand for more battlespace bandwidth across the board has been growing faster than the military can implement new technologies to address it, so has it impacted the ongoing evolution in SoC speed and capability. That is especially true in areas such as EW, software-defined radios, and large antenna arrays.
"EW has an ever-increasing demand for bandwidth, digitizing beyond 200 GHz of spectrum, which is massive - and it never ends," Langlois says. "We're talking thousands of gigaMACs, which is one billion multiply and accumulate instructions that just about any signal processing app uses. In some cases, we have on the order of 2000 to 3000 gigaMACs of digital signal processor (DSP) capability. In EW, where you're trying to digitize and analyze 200 gigabits of bandwidth, these SoCs certainly will be important. Another big app is phased array, where you have arrays of antennas for MIMO [multiple input/multiple output] apps, 10x10 or bigger.
"In terms of SDR, the P25 standard proposed for public safety apps is seeing a lot of interest, [especially] any type of comms system that needs to send video, Langlois continues. "The avionics space certainly has multiple requirements (HUDs, SATCOM, radar, security) with new features making it harder to reverse-engineer this new family of SoCs. The same is true for anything that goes into space and needs to be rad-hard and robust in terms of single event upsets. These new SoCs will be used there, as well, although there is always a lag between the creation of any type of rad-hard chip and its incorporation into final products."
Data converter standards
The JESD204/JESD204B revision data converter serial interface standard was created through the JEDEC committee to standardize and reduce the number of data inputs/outputs between high-speed data converters and other devices, such as field-programmable gate arrays (FPGAs).
JESD204B supports the high bandwidth required by current generation high-performance, high-speed, and multi-channel applications, while greatly reducing the number of digital I/Os needed. For example, very high-speed analog-to-digital converters previously requiring a complex interface design of multiple FPGA I/Os, now accomplish the same task with only a few pins. The interface's total bandwidth also can be separated into multiple channels based on application requirements, but without requiring additional pins.
Fewer interconnects simplifies layout and enables smaller form factor realization without impacting overall system performance, according to Analog Devices Inc. (ADI) in Norwood, Mass. These attributes are important to address the system size and cost constraints of a range of high-speed A/D converter applications, including wireless infrastructure, transceiver architectures, software-defined radios, portable instrumentation, medical ultrasound equipment, and military-aerospace applications, such as radar and secure communications.
There were incremental improvements and innovations in the shift to advanced SoCs. Programmable logic with embedded processors began appearing some 10 years ago. Speciality CPUs had ARM and DSP accelerators, but they weren't as flexible as programmable logic. Langlois says the race really started around 2004-2005, as traditional FPGAs became more of a software engine and began to rival existing products.
The next big milestone for Xilinx was Zynq, which is marketed as an SoC rather than an FPGA. It came to the forefront about four years ago, when combining software, hardware, and multiple peripherals began to appear.
Parallel signal processing
"The next step is what to do with all that data," Avnet's Langlois adds. "Over 200 gigabytes of bandwidth requires a whole lot of processing power to pull out data. You need massively parallel signal processing, which we're pulling into with embedded processors, such as Xilinx' Zynq Ultrascale+ MPSoC [multiprocessor SoC], a true SoC with all the programmable logic, but also a 64-bit quad-core ARM A53 processing system, on-chip memory, security features, more gigabit receivers, and signal processing in a single device, That is our flagship, just now rolling out, with the first devices shipping this summer."
This new generation of SoC offers numerous advantages to the end user: much higher performance, faster design-to-market cycles, the ability to leverage years of legacy software, etc. However, it also imposes a need for more software expertise on the part of designers, especially as end users increasingly demand pre-engineered solutions, rather than trying to build their own solutions from scratch as SoC complexity gets higher and higher with each new release. It is all part of an effort to avoid the commercial smartphone obsolescence track, where buying a phone more than a year old could be several generations behind in technology and software.
"The software infrastructure is now going to dominate the whole landscape of development and, by extension, all the functionality the user can get," Langlois says. "For example, a lot of our military customers are designing products they not only want to be able to communicate, such as SDRs, but also send video, sometimes from multiple camera streams, over the air securely. That has been very challenging because you don't have enough bandwidth to send raw video. The latest generation, however, can compress that video within the SoC, using H.265 High Efficiency Video Coding, making it feasible to send streaming video from a UAV."
Several trends have forced evolutions of systems architectures, in turn driving evolutions of required buses, according to a white paper by SoC specialist Arteris Inc. in Campbell, Calif. The first trend involves application convergence, "the mixing of various traffic types in the same SoC design (video, communication, computing, etc.)," the Arteris white paper states. "These traffic types, although very different in nature, for example from the Quality of Service point of view, must now share resources that were assumed to be 'private' and handcrafted to the particular traffic in previous designs.
"Moore's Law is driving the integration of many IP blocks in a single chip. This is an enabler to application convergence, but also allows entirely new approaches - parallel processing on a chip using many small processors - or simply allows SoCs to process more data streams, such as communication channels," according to the white paper. "Consequences of silicon process evolutions between generations: Gates cost relatively less than wires, both from an area and performance perspective, than a few years ago.
"Time-To-Market pressures are driving most designs to make heavy use of synthesizable RTL [register transfer levels] rather than manual layout, in turn restricting the choice of available implementation solutions to fit a bus architecture into a design flow," the white paper says.
It leaves SoC manufacturers in a bit of a quandary: trying to keep up with an extremely fast-moving and evolving technology and using it to meet increasingly complex military demands, while at the same time remaining cognizant of the realities of military procurement and life cycles.
Military market issues
"We are using what the industry provides us to work with; what else they do in the future will come and we will adapt it to serve our needs and comply with military standards. We're always looking for new technology that will enable us to improve our equipment. We're in the middle, following the [processor] manufacturers on one side and providing solutions to identified needs of the military on the other," says Techaya's Sucher.
"Everything is going faster, getting smaller, and adding processing capability. Today you have 10G, 40G, and 100G in bandwidth, so I think the next step is security and cyber," Sucher says. "If you have a smaller device, you have more space to build protection circuits around it, but cyber security isn't necessarily easier with SoC. We have some solutions in the pipeline for those, but it's too early to go into detail. However, they are essential to make sure our systems are well protected and can't be jammed or penetrated."
There is general agreement that the U.S. and Israel stand well ahead of the rest of the world - friend and foe - in the development and fielding of advanced SoCs, in no small measure a combination of their technology bases and their customer demands to fit into smaller and smaller form factors, which cannot be achieved in any other way. But others, notably China, are working hard to catch up.
The role of China
"We see a lot of Chinese companies trying to buy Israeli companies, so it's hard to tell if innovation in China comes from domestic efforts or from what they are buying or trying to buy elsewhere. But the U.S. and Israel must remain in the lead," Sucher says.
Avnet's Langlois says he agrees, not so much because of the technology itself, but the ability to use it. "I doubt very much the U.S. is in danger of losing its edge. It's not just about the device; you're seeing so much functionality, it is extremely challenging for design teams to even leverage what they have. So a lot of the investment of leading U.S. companies making any type of embedded processing is in tools and design flow," Langlois explains.
"You can't just get into this business without a massive investment in tools, high-level synthesis; you just can't spin that up in a short amount of time. I don't see anyone else able to give their design teams those tools, which require years of development. Israel has a lot of expertise in very niche market segments, but the underlying chips, so far as I know, are all from the U.S.," Langlois adds.
Network-on-chip
The continuing development of faster, smaller, lighter, less power-hungry, and more capable microprocessors and the new trend from quad-core to octacore processors has enabled one new evolution in the SoC concept: network-on-chip (NoC).
According to Arteris Inc., its advanced NoC employs system-level network techniques to solve on-chip traffic transport and management challenges, using a homogeneous, scalable switch fabric network to transport multipurpose data packets within complex, IP-laden SoCs.
"The NoC approach has a clear advantage over traditional buses for nearly all criteria, most notably system throughput," according to an Arteris white paper.
"Hierarchies of crossbars or multilayered buses have characteristics somewhere in between traditional buses and NoC; however, they fall far short of the NoC with respect to performance and complexity," according to an Arteris white paper. "Detailed comparison results necessarily depend on the SoC application, but with increasing SoC complexity and performance, the NoC is clearly the best IP block integration solution for high-end SoC designs today and into the foreseeable future."
Billions of new embedded devices, from commercial smartphones to military radars, are shipped each year. And each year sees a greater number of those capable of higher and higher degrees of connectivity, especially "plug-and-play" connections, utilization of cloud computing paradigms, and the ability to serve as their own platforms for collaboration and networking.
As multi-core architectures, internationalization, efficient security algorithms, and open source platforms become more and more dominant, everyone from engineering design teams to SoC/NoC producers to end users need to maintain a vigilant knowledge of the technologies involved and the implications as such systems become ubiquitous.
"As silicon providers like Intel and AMD continue to drive down the size, power, and cost of their SoCs, there will likely be more proliferation of their platforms into the more outer layers of IoT," predicts Congatec's Demers. "That is where the significant growth is happening and it is quite a race we are witnessing. Those who master the layout and placement for small-form-factor boards and modules will likely have even more influence on their shapes and sizes (specifications) in the future."
The anatomy of a system-on-chip
A typical SoC comprises:
- a microcontroller, microprocessor, or DSP core - MPSoC having more than one processor core;
- memory blocks, including a selection of ROM, RAM, EEPROM, and flash memory;
- timing sources, including oscillators and phase-locked loops;
- peripherals, including counter-timers, real-time timers, and power-on reset generators;
- external interfaces, including industry standards, such as USB, FireWire, Ethernet, USART, and SPI;
- analog interfaces, including A/D converters and D/A converters; and
- voltage regulators and power management circuits.
- A bus - either proprietary or industry-standard, such as the AMBA bus from ARM Holdings - connects these blocks. DMA controllers route data directly between external interfaces and memory, bypassing the processor core and thereby increasing the data throughput of the SoC.
