by Jeffrey M. Harris
The VME Renaissance is a sign that many companies are focusing investments in the VME ecosystem.
On January 22 at the Bus & Board Conference in Long Beach, Calif., Motorola began opening the curtain on what we believe is the future of VME — an industry program called the VME Renaissance. The VME Renaissance is intended to herald an era of profound innovation and performance improvement while maintaining backward compatibility and protecting existing customer investments.
The VME Renaissance should give VME a faster parallel backplane interconnect, a switched serial interconnect on the backplane coincident with the traditional parallel interconnect, and point-to-point mezzanines on the cards. The VME Renaissance should be of particular interest and benefit to the military and aerospace electronic systems designers in terms of technical and business issues.
Technical perspectiveThe VME Renaissance should usher in many noteworthy technological improvements, yet its most salient technical advancement will be vastly improved interconnect capability between the cards in a chassis.To put this advancement in context, consider VME at the time of its birth 20 years ago. The original concept of VME's card cage was to modularize a computer over many exchangeable cards, and make the many individual cards function as one system. In the first days of VME, there was one card for the CPU integer unit, another card for the floating-point unit, one or more cards for memory, one or more cards for input, and one or more cards for output. All of these cards functioning together through the backplane acted as one computer system. The concept was handy because it segregated circuits for a particular function on one card; replacing or upgrading any card was easy.
As VME matured, the components on the cards got faster. While designers could place more circuitry on one card, the backplane interconnect did not keep pace with on-card advancements. In any backplane system, the interconnect speeds on the backplane do not keep pace with the intra-board speeds, not because the technology isn't available, but because changing the backplane interconnect is a big deal — it influences the entire system. In contrast, changing the on-board intra-connect can be done on any single board in isolation without affecting the system. Because of this relationship, backplane speed increases tend to roll out in big spurts that last five years or more, whereas on-board connectivity tends to undergo a continuous and gradual increase.
Today, VME has reached a state where a backplane speed increase is overdue. What have evolved today are on-board speeds that are extremely fast in comparison to the backplane speeds. System architects using VME are forced to put as much as possible on each card to avoid taking the slow journey across the backplane, simply to maintain a high level of system performance. Yet this approach imposes a series of rippling drawbacks, each one feeding on another.
Increasing the number of parts on an individual card necessitates higher density to populate the additional circuitry. Additional density, in turn, requires additional power for this extra circuitry. Then comes the need for additional cooling. The lack of a viable high-speed VMEbus backplane leaves designers with a need for more space, more power, and more cooling on each card. In short, allowing the backplane interconnect to become slow in relation to on-card circuitry is starving architectural freedom.
The VME Renaissance will deliver innovations that will solve this problem. The VME parallel bus will experience an 8X increase in performance through a protocol called 2eSST, which a Motorola chip codenamed Tempe will implement. The VMEbus International Trade Association (VITA) set the 2eSST protocol as a standard and made it available for use in December 1999.
The 2eSST protocol, which stands for "two edge source synchronous transfer," is a significant advancement over the VME64 protocol in use today in a majority of VME implementations. In addition to supporting the new 2eSST protocol, Tempe supports all of the old 6U VME protocols. This means that Tempe-enabled cards can be plugged into an existing chassis with other VME cards that do not speak 2eSST; the old VME cards will continue to speak at whatever rate they were designed for, while Tempe-enabled cards speak at the new 2eSST rate. Tempe-enabled cards communicate with VME64 cards in the VME64 protocol.
In this way each transaction on the bus progresses at the fastest possible rate independently of other transactions in the system. Tempe and the 2eSST protocol will raise the transaction speed on the parallel bus from about 40 megabytes per second to about 320 megabytes per second — about three times faster than a loaded 64-bit 33 MHz CompactPCI bus, which runs at a practical speed of around 110 megabytes per second.
The VME Renaissance will add an optional standard high-speed switched serial interconnect that will operate side-by-side with the traditional parallel bus. It turns out that many VME users need the kinds of high-bandwidth transfers between VMEbus cards that VME64 cannot handle.
A systems designer currently must add another communication path between the cards coincident with the VME64 bus if he were to require data transfers in excess of VME64's practical bandwidth of 40 megabytes per second. Designers often refer to such a communications path as the "data plane." Customers may add a proprietary data plane interconnect of their own invention, or they may choose one of the commercially available data plane interconnects such as the Mercury Raceway or Sky Computers SKYchannel. In cases like this where customers add a data plane interconnect, they relegate the VME64 bus to synchronizing and orchestrating activities — functions commonly done in an application space called the "control plane."
Work is in progress to define and standardize the VMEbus Switched Serial (VXS) interconnect, with products anticipated sometime in 2003. VXS implementations will sport ultra-low latency interconnects that not only yield a 50X increase in transaction bandwidth, but also a 900X increase in aggregate chassis bandwidth relative to VME64. These VXS interconnects will employ industry-standard switched serial technologies such as InfiniBand, RapidIO, 3GIO, and so on. VXS will be an option to use with the always-present VME parallel bus. Some applications do not need VXS speeds, and do not have to employ it; they can stay with VME64 or 2eSST on the traditional VME parallel bus. Most existing VME cards, however, will be compatible with a VXS implementation to help protect the entrenched investments.
These interconnect advancements, in effect will enable designers to "dis-integrate" their systems and balance them across the chassis. This is especially important in the military and aerospace markets where extended temperatures, rugged reinforcements, and non-air cooling are every bit as important as system performance.
From the business perspectiveOne of the great attractions of VME has been its extensive collection — or "ecosystem" — of competing, complementary, and supporting products and/or services. Take the automobile industry, for instance. There are many shapes and sizes of automobiles, dealerships that sell automobiles, automobile parts outlets, auto repair shops, auto insurance agents, car-rental agencies, and on and on.A good measure of a technology's health is the breadth of its ecosystem. Classic automobile owners, for example, know that as their cars age, the ecosystem of parts and support services dries up. This happens because technologies, like living things, have two states — growing and dying. If the technology is healthy, the ecosystem grows and provides an abundance of offerings. If the technology is waning, however, the ecosystem begins to shrink and implementation options begin to narrow.
The VME Renaissance is a sign that many companies are focusing investments in the VME ecosystem, and these investments will continue to propel the ecosystem to healthy growth levels. It also means that in addition to the military and aerospace markets participating in the VME ecosystem, the commercial market will continue to participate and bring commodity pricing and a wide breadth of offerings to the party. The commercial market's enhanced participation in the VME ecosystem will drive new products and technologies into the VME ecosystem in a timely manner, which will benefit the military and aerospace markets.
Dr. Jeffrey M. Harris is director of research and system architecture in the Motorola Computer Group in Tempe, Ariz. His e-mail address is [email protected].
