JTAG chain debugger for designing and testing complex PC boards

Jan. 1, 2006
XJTAG in Cambridge, England, is adding a JTAG chain debugger to its XJTAG Development System, which will reduce debug and test times for engineers designing and testing complex printed circuit boards.
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XJTAG in Cambridge, England, is adding a JTAG chain debugger to its XJTAG Development System, which will reduce debug and test times for engineers designing and testing complex printed circuit boards. The JTAG chain debugger features a range of debug options that allow designers to trace signals around the board and immediately find the location of any problems within the JTAG chain. This capability means that engineers can get boards up and running quickly, rapidly diagnose faults and speed up the whole development process. In addition to the new chain debugger, the XJTAG Development System has been enhanced with a host of other new features to speed up board design and prototype testing. For example, the connection test now includes built-in testing of pull-up and pull-down resistors, along with more precise fault detection. Within XJAnalyser, BSDL file autodetection has been improved and the library of reusable JTAG scripts has been greatly expanded. It is also much quicker now to set up non-JTAG devices following enhancements to the Devscript utility for XJEase. The XJTAG Development System incorporates XJAnalyser, XJEase, XJRunner, XJLink and XJDemo. XJAnalyser is for circuit visualization that provides a graphical view of the state of all JTAG pins. For more information contact XJTAG online at www.xjtag.com.

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