By Richard Kirk
Achieving competitive advantage in a standards-driven market has long challenged many companies. Back in the early 1980s, Texas Instruments (TI) officials believed they could win in the personal computer market by making a machine better than the IBM PC-even if that meant introducing some nonstandard elements. A group of TI engineers disagreed so strongly-countering that rigorous observance of IBM-dictated standards was a mandatory starting point-that they left TI and formed their own company, known today as Compaq. The rest, as they say, is history.
The military and aerospace market is now heavily permeated by commercial off-the-shelf (COTS) technology solutions. The COTS approach has prevailed because it has delivered on the benefits envisaged by former U.S. Defense Secretary William Perry more than 10 years ago: substantially improved price, performance, and cost of ownership through the adoption of industry standards.
COTS suppliers are, by definition, in the business of providing commodity products-a business model that can only deliver success if manufacturers find ways of maintaining form, fit, and function compatibility while creating differentiation that customers value.
But where does that opportunity for differentiation lie? Form factor is, for example, a given: 6U and 3U versions of VME and CompactPCI prevail in COTS applications, and the proposed VITA 46 and VITA 48 standards will see this prevalence continue with new 6U and 3U boards designed to support switched fabrics and high-speed I/O through high-speed connectors. Of course support of VME and/or CompactPCI is nonnegotiable.
Creating differentiation through silicon is also hard to do. As silicon becomes more integrated and more complex, the choice of components becomes more restricted. Differentiation becomes more difficult at a hardware level; a glance at the typical single-board computer (SBC) data sheet will show the same core components appearing time and again. Dominating the military and aerospace market is the PowerPC microprocessor architecture, which in turn determines to a large extent supporting silicon such as host bridges that designers can use on any given board. The choice of a host bridge, with its set of integrated features and functionality, dictates the I/O that the board will support. All that’s left to complete the board is an appropriate amount of RAM, Flash memory, and NVRAM.
This increasing standardization, however, is taking place against a backdrop in which customers are ever-more demanding; the commodity nature of COTS does not preclude customers from wanting solutions specific to individual applications. On the supply side, there is something of a “one-size-fits-all” approach-but on the other side, only tailoring is good enough.
One approach to this that’s enabled by the availability of increasingly dense silicon is to leverage more and more functionality onto every board to make the most of potential solutions. This approach has obvious attractions in the area of I/O-primarily because it is in I/O requirements that the significant differences in customer applications can be found. That’s no surprise: the whole industry is currently characterized by an explosion of I/O options, especially in relation to switched fabrics. Customers are anxious to retain their legacy I/O options, but want the ability to integrate newer technologies-an anxiety that VITA 46, for example, sets out to assuage.
Increasing degrees of component integration have seen the availability of boards with several Gigabit Ethernet ports, a memory controller, bridging to external buses or fabrics-and all this with a couple of state-of-the-art processors. But while it’s theoretically possible-and becoming even more possible-to create a board that has all the functionality that a customer could ever desire-that would, in effect, provide a solution from a one-size-fits-all design-there is a fundamental reason that such a board is unlikely to be produced. By definition, its cost would be inordinately high-not in itself an issue for the rare customer who needed all the functionality it offered-but a very real issue for the customer who wanted only a subset of its features.
It’s not just about the money, however. While it is theoretically possible to integrate increasing amounts of functionality on one board, there are practical issues to be considered. Rapid increases in I/O speeds, for example, mean that specific impedance-controlled tracking is necessary, which makes it increasingly difficult to design a multipurpose board that can be all things to all people. Perhaps the way forward is to support only a core subset of I/O functionality-serial, Ethernet, and USB, for example-on the main board, and to find a new way of leveraging today’s technology to deliver maximum I/O flexibility in a cost-effective manner.
Flexible I/O
“Flexible I/O” is, undoubtedly, the way forward. The question is how to deliver it. One approach is, of course, to modify an existing board to deliver the required customer functionality, but this is potentially fraught with problems if functionality unanticipated at the design stage is subsequently retrofitted.
The role model for an alternative approach is the PMC-the ubiquitous PCI mezzanine card. Until relatively recently, PMCs were a more than adequate solution for the I/O requirements of the large majority of customers; the typical installation requires several processors, and the ability of each processor card to handle only one or two PMCs was not a limitation. Still, the availability of much more powerful processor boards has substantially reduced the number of slots necessary for processor boards; one SBC is now capable of doing the work that would previously have required several SBCs. Now, however, the number of PMCs that each board can support is an issue.
A possible way forward is a solution that comprises one SBC with several PMCs, yet systems integrators are loathe to use more slots than is absolutely necessary and are always looking to squeeze the maximum amount of functionality into one slot.
The obvious remedy to that problem is to increase the number of PMC sites on one board computer-but for conduction-cooled boards, two PMC sites are the practical limit. For Radstone Technology in Towcester, England, as for other vendors, the approach that looks most likely to succeed is to make provision for a third pluggable module, smaller in size than a PMC but with similar capabilities. In Radstone’s case, the solution is called AFIX-for “Additional Flexible Interface Xtension”-and it offers a range of standard interfaces, as well as being offered as a rapid prototyping route for any bespoke interfaces that are requested by customers. Unusually, Radstone’s AFIX supports a connector capable of signal frequencies up to 5 gigahertz, “future-proofing” it for successive generations of even faster I/O.
Beyond plug-on modules, the focus is increasing on reconfigurable I/O implemented in a programmable device such as a field-programmable gate array (FPGA) that can be programmed either in the factory or by the customer. This approach is already available on COTS SBCs, although not yet by Radstone. In theory, there is a whole range of I/O that can be created in this way-but in fact, the range is somewhat limited by the range of voltage levels which can be output from an FPGA: the FPGA can be used to create only a limited range of I/O features, needing the addition of output buffers for more “exotic” I/O. This approach, then, offers limited flexibility although combining it with pluggable modules offers promise for the future.
Perhaps the ideal solution for any customer, however, is to have a complete “personalized” solution on one board. As an approach to meeting customer needs, it’s long-established; it offers the advantage of an exact match with the requirements and potentially lower unit costs. On the other hand, it has the drawbacks of high initial (NRE) cost, extended timescales-and the potential risk of the redesign not working. It is therefore perhaps best suited to large-scale, long-term programs-but in an ideal world, it’s an approach that could work equally well for smaller, shorter-term requirements.
Possibly the ideal solution is to make products “modifiable by design”-to allow for the incorporation of flexible I/O at the SBC design stage, permitting a customer to specify as a “build option” functionality that can be unique to his application. There are various ways in which designers can approach this-the most obvious is to leave enough space on the board to add features without disturbing the core design. Radstone addresses this by leaving a “customizer” area on the PowerXtreme PPC7A VME single-board computer, which was used, for example, to add a Firewire port to win a major program on the M1A2 main battle tank. This approach lowered costs and risks, as well as shortened lead-times compared to a totally new design.
In reality, the “customizer” approach is not so very different from the concept of the AFIX plug-on module-but instead of leaving a blank area on the host board, the blank area resides on a daughterboard attached via a connector to the host card on which the customer can specify his own circuitry. In fact, the AFIX route reduces timescales even further than the customizer route, as only a small module is being designed that can be prototyped quickly and independently of the host card.
In summary, it can reasonably be said that the quest for competitive advantage in the single-board computer market coincides with the increasing diversity of customer demands in the area of I/O, and the requirement to be able to respond to those demands in a timely, cost-effective manner. The manufacturers who best fulfill those demands will prevail: competitive advantage can be secured while maintaining the key baseline of form, fit, and function compatibility.
Richard Kirk is product marketing manager of processors for the digital processing unit of Radstone Technology in Towcester, England.
