MIPS accelerates processor IP verifi-cation with Mentor Graphics Veloce

Oct. 1, 2009
Engineers at MIPS Technologies, a microprocessor semiconductor intellectual property (IP) company in Sunnyvale, Calif., sought a solution to perform complete system-level verification of its licensable microprocessor cores used in a variety of embedded applications.
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Engineers at MIPS Technologies, a microprocessor semiconductor intellectual property (IP) company in Sunnyvale, Calif., sought a solution to perform complete system-level verification of its licensable microprocessor cores used in a variety of embedded applications.

They found their solution, the Veloce platform, at Mentor Graphics Corp., maker of high-performance system verification solutions, in Wilsonville, Ore.

MIPS Technologies officials selected the Veloce platform for its debug capabilities, performance, accuracy, and portfolio of iSolve vertical market solutions, according to company representative.

“As a technology leader in embedded processor IP, MIPS has leveraged Veloce on several of our recent IP development projects—including the multi-threaded, multi-core 1004K Coherent Processing System—to verify new cores before releasing them to customers,” says Larry Hudepohl, vice president of engineering for MIPS Technologies. “We use Veloce extensively in an in-circuit emulation mode and for simulation acceleration. The Mentor emulation team helped us tremendously in making an easy transition to the Veloce platform from our previous systems.”

The Veloce platform is a fast, dual-mode accelerator/emulator, providing MHz performance for both transaction-based verification and traditional in-circuit emulation (ICE) in multimedia, networking, wireless, and embedded systems applications.

For more information, visit Mentor Graphics online at www.mentor.com.

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