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  1. HPEC options grow for SWaP-optimized systems

    High-performance embedded computing is expanding to a growing number of designs, ranging from Intel-based systems, to FPGAs, hybrid approaches, and full-custom computers. High-performance embedded computing (HPEC) for challenging sensor- and signal-processing applications like radar, sonar, electronic warfare (EW), and signals intelligence (SIGINT) used to be a proprietary affair, with complex mixtures of specialized processors, application-specific software, and exotic thermal-management approaches to cool typically hot-running electronics. Today, however, that's all changed, and HPEC for sensor processing, digital signal processing (DSP), and other challenging embedded computing applications is more accessible than ever before - even for applications where small size, weight, and power consumption (SWaP) is a primary concern. The BittWare A10PL4 PCI Express board is the first in a family of Arria 10 FPGA/SoC-based products which includes support for 3U VPX and XMC. One of the most significant HPEC developments in the last several years came last spring when Intel Corp. in Santa Clara, Calif., introduced the Xeon D microprocessor, a rugged server-class chip packaged on a ball grid array (BGA) that can bring unprecedented embedded computing power in an open-standards format. Even though the Intel Xeon D and high-end, mobile-class processors like the Core i7 are helping bring HPEC to a growing number of embedded applications, there still is room for more complex HPEC architectures when system requirements are at their most demanding. Field-programmable gate arrays (FPGAs), general-purpose graphics processing units (GPGPUs), and even the high-end, power-hungry, and hot-running Intel Xeon server-class processors are playing significant roles in the latest HPEC designs. HPEC also is helping push the bounds of rugged deployable thermal-management techniques to keep processors cool when the battlefield heats up. What is HPEC? As relatively easy as HPEC architectures have become to design and deploy, one of the most difficult aspects of HPEC is defining what it is. There is not a clear consensus in industry on what constitutes HPEC, but typically it involves several computing cores working in parallel, and can consist of one or more types of high-end processors. HPEC architectures generally fall into four different camps: "big-box" designs based on powerful Intel microprocessors; small and tight designs based on FPGAs; hybrid designs that blend general-purpose and server-class processors, FPGAs, and GPGPUs; and custom designs that make innovative use of proprietary computing architectures and thermal-management techniques. The HPEC embedded board from Mercury Systems features the Intel Xeon D microprocessor. Much of what defines HPEC these days "depends on who you're talking to and the problem they're trying to solve," says Shaun McQuaid, director of product management at Mercury Systems in Chelmsford, Mass. Many practitioners of HPEC refer to the Intel model when describing what HPEC is, and what it is not. "At the low end, you have the Atom processor," Mercury's McQuaid says. "In the middle, you have the mobile-class processors like the Core i5 and Core i7. On top, you have the Xeon processors - and even in the Xeon processors you have different segments." Others say HPEC simply refers to demanding signal-processing applications that require small size, weight, and power (SWaP). "To me, HPEC is much more SWaP stuff, and not the big iron that happens to be conduction cooled," says Jeff Milrod, CEO of BittWare Inc. in Concord, N.H., which specializes in FPGA applications in HPEC. When it comes to HPEC, Milrod says he sees three market segments: the large rack-based systems based on Intel and other general-purpose processors, as well as hybrid architectures mixing processors, GPGPUs, and FPGAs; smaller-sized custom solutions; and relatively small architectures based largely on commercial off-the-shelf processors. The 6U OpenVPX Starter System from GE Intelligent Platforms is a member of the company's HPEC Application Ready Platforms (HARP) product family and features Intel Core i7 processors. For BittWare, Milrod defines HPEC as high-performance processing that consumes power in the tens of watts range. "I consider that achievable with today's FPGAs, and I think that will be a game changer," he says. Ultimately, HPEC involves high-performance processing on a scale that historically has been found in the supercomputer and server worlds that requires specialized ruggedization, packaging, and engineering to render this kind of computing appropriate for embedded applications in harsh environments. The role of HPEC The role of HPEC in aerospace and defense applications has grown as embedded computing architectures have shrunk in size, weight, and power consumption to accommodate the explosion in on-board sensors and data networking on manned and unmanned aircraft, ships, submarines, and land vehicles. The need for high-end sensor processing in sophisticated applications like imaging radar, hyperspectral imaging and other electro-optical sensors, electronic warfare (EW), signals intelligence (SIGINT), and future applications like passive radar and sonar have made HPEC a necessity rather than a luxury. One of the problems is the bandwidth of data links. The massive amount of information from a growing number of deployed sensors makes it imperative to process sensor information at the sensor or on the platform, rather than data-linking the information to remote processing stations. "Radar and EW continue to provide challenges for compute power within SWaP constraints, with latency a big driver for EW in particular," explains Peter Thompson, senior business development manager for high-performance embedded computing at GE Intelligent Platforms in Huntsville, Ala. The GE DSP281 dual quad core HPEC platform brings data center performance and scalability to deployed defense and aerospace applications. "We see strong growth in situational awareness [SA] and autonomy," Thompson continues. "SA requires the ability to ingest multiple video and other sources, process them, and display various views - all with minimal glass-to-glass latency in a compact system that can be added to a platform that often wasn't designed with it in mind. Autonomy takes that and adds in a safety-critical element with all the challenges that brings." Bittware's Milrod also sees EW, radar, and SIGINT as major technology drivers for HPEC. "We are doing 3U VPX and XMC applications in HPEC," he says. "Our applications would be mid-sized unmanned aerial vehicles (UAVs) where designers are putting in 3U boxes." Lots of embedded computing in a small space essentially sums up HPEC, says Vincent Chuffart, portfolio manager for aerospace, transportation, and defense at Kontron AG in Plou-lon, France. "Typically HPEC involves problems and applications that cannot be tackled with a typical mono-socket CPU architecture, where you need a lot of computer power in a small space," Chuffart says. "Today with cloud computing and big data, there is no problem too big for IT technology," Chuffart continues. "That is where embedded computing comes in. You cannot always get the computing power of the cloud for your problem. The bandwidth needs could be prohibitive, and you need to do these decisions locally. "Some of the sensor problems like sonar, radar, video surveillance, and situational awareness are examples of this," Chuffart says. "It's really about the amount of data you need to process. No cameras are 4K by 4K pixels on the regular UAV, and you don't send a raw feed of that amount of data to the ground station; you process it locally." HPEC architectures One of the most prevalent architec- tures for HPEC involves a so-called "hybrid" design that blends general-purpose processors, server-class processors, FPGAs, and GPGPUs. For some systems integrators - especially those designing for the most demanding architectures - the hybrid approach is the only way to get the processing horsepower they need. Although there are plenty of potential applications for hybrid HPEC designs, the introduction this past spring of the Intel Xeon D embeddable server-class processor has brought about a fundamental shift in the concept and deployment of HPEC in aerospace and defense applications. "The Xeon D represents a new branch of HPEC, which particularly is beneficial for the defense industry," says Marc Couture, senior product manager for digital signal processing at the Curtiss-Wright Corp. Defense Solutions Division in Ashburn, Va. "For a number of years, we have been marching through the Intel Tick-Tock, starting with mobile processors and the GPU. Now along comes this family called Xeon D. Not only is it a BGA part that can be soldered down, but Intel also will announce an extended-temperature version later this year. "The Xeon D also consolidates onto one chip the southbridge I/O controller hub," Couture points out. "It's a single device, and for tight form factors - 3U in particular - Xeon D is particularly nice, and has created a lot of stir." With all the computing power that the Xeon D offers, it still isn't enough for the most demanding HPEC implementations where designers want to go with an open-systems, Intel-based architecture. "For the multi-intelligence programs like synthetic aperture radar imagery imposed on an EO/IR [electro-optics/infrared] image where you need teraflops of performance, that's where you use the Xeon D with a GPGPU," Couture says. "That model is still applicable." Hybrid architectures While the Xeon D processor brings a lot of embedded computing power to the table, the new processor will not eliminate the need for a hybrid design, says Mercury's McQuaid. "The Xeon D, as well as the introduction of Xeon-class processors, has driven change in the embedded computing industry, but rather than eliminate the need for a hybrid architecture, the bar has been raised." "The hybrid architecture still makes sense if you need to squeeze out all the performance you can, and are willing to pay the penalty of the new software complexity it imposes," McQuaid explains. Mixing general-purpose processors, FPGAs, GPGPUs, and server-class processors in the same system requires a company to have in-house software expertise to support each different kind of processor. Using just one kind of processor, like a Xeon D or Intel Core i7 for example, can simply the software part of the equation. "Anyone who knows C and C++ has ease of programming with high-performance processors like the Xeon D," McQuaid says. "There are a set of applications where it is not worth adding that specialized experience in their architectures." For some designs, neither the Xeon-only nor the hybrid approach offers the advantages in SWaP that other kinds of architectures can offer. "We always have been focused on the smaller, dense computing applications, and cooling is an issue in that space," says BittWare's Milrod. HPEC with FPGAs "We are good at fitting the power density into things that can be cooled with standard traditional approaches, such as optimizing to spread heat out to make it realistically coolable," Milrod says. "Leading-edge cooling is not in our space." These are among the issues that lead BittWare to rely heavily on FPGAs for HPEC applications. BittWare offers FPGA-based coprocessor and acceleration support for hybrid HPEC designs. "We can pop an FPGA into an Intel server-class board and do offload computing and special functions. It's a lot lower power and performance than you can get with the GPGPUs." For Milrod and other FPGA specialists, there are other recent breakthrough technologies than the Xeon D to enable HPEC applications. "FPGAs now have pretty high-performance ARM processors in them now. These SOCs [systems on chip] have 1.5 teraflops of hard floating point processing with multi-gigahertz ARMS in one FPGA package." Others argue that FPGAs confront users with special software challenges, but Milrod says the Open Computing Language (OpenCL) language - of particular interest to GPGPU users - also has application to simplify FPGA software support. "The FPGA vendors are doing tremendous work in standardizing with Apple and Nvidia with OpenCL initiatives for streaming and pipes to allow streaming inputs and multi kernel implementation with much easier development environments," Milrod says. The custom approach For some HPEC designers, the custom approach is the way to go, and it seems to be paying off. General Micro Systems (GMS) in Rancho Cucamonga, Calif., has an HPEC design called Rugged Cool that packages high-end Xeon server-class processors in a rugged design that offers eight to ten server-class processor cores, and can cool processors running as hot as 300 watts in a conduction-cooled box. "VPX cannot cool this kind of stuff," says Ben Sharfi, CEO of GMS. "We are deploying dual Xeon processors - each one running 85 watts. We have a box called Tarantula with single or dual processors, with 28 cores of Xeon processors in one box." Some might criticize GMS for not using a standard approach but Sharfi claims design wins aboard the U.S. Army Apache and Chinook helicopters, as well as on a night-vision system on the MRAP armored combat vehicle. "At the end of the day, it all comes down to cooling," Sharfi says. "There is a need to conduct the entire surface of the processor board to the frame of the platform, and that's what our technology does."

    Magazine Articles

    Magazine Articles

    Wed, 19 Aug 2015

  2. EMBEDDED COMPUTING: 3U VPX GPGPU embedded computing board for sensor processing and C4ISR offered by Aitech

    Aitech Defense Systems Inc. in Chatsworth, Calif., is introducing the C530 3U VPX general-purpose graphics processing unit ( GPGPU ) embedded computing computer for advanced sensor processing and applications in command, control, communications, computers, intelligence, surveillance, and ...

    Magazine Articles

    Magazine Articles

    Tue, 14 Jan 2014

  3. 3U VPX GPGPU embedded computing board for sensor processing and C4ISR offered by Aitech

    CHATSWORTH, Calif. 18 Nov. 2013. Aitech Defense Systems Inc. in Chatsworth, Calif., is introducing the C530 3U VPX general-purpose graphics processing unit ( GPGPU ) embedded computer for advanced sensor processing and applications in command, control, communications, computers, intelligence, ...

    Online Articles

    Online Articles

    Mon, 18 Nov 2013

  4. GPGPU technology sparking a revolution in embedded computing

    The general-purpose graphics processing unit ( GPGPU ) from companies like NVIDIA and AMD is bringing high-performance embedded parallel processing to SWAP-constrained signal processing in unmanned vehicles and other persistent-surveillance applications.

    Magazine Articles

    Magazine Articles

    Fri, 1 Mar 2013

  1. GPU EMBEDDED COMPUTING: GPGPU -based 6U OpenVPX embedded computing board introduced by Mercury for radar, EW, and image processing

    Magazine Articles

    Magazine Articles

    Sat, 1 Sep 2012

  2. GPGPU -based 6U OpenVPX embedded computing board introduced by Mercury for radar, EW, and image processing

    CHELMSFORD, Mass., 13 June 2012. Mercury Computer Systems Inc. in Chelmsford, Mass., is introducing the Ensemble series 6000 Dual AMD general-purpose graphics processing unit ( GPGPU ) 6U OpenVPX GSC6201 module for military embedded systems such as high-end radar, electronic warfare (EW), and image ...

    Online Articles

    Online Articles

    Wed, 13 Jun 2012

  3. GPGPU processor and 10-Gigabit Ethernet embedded computing boards for radar processing introduced by Mercury

    CHELMSFORD, Mass., 26 May 2011. Mercury Computer Systems Inc. in Chelmsford, Mass., is introducing a general-purpose graphics processing unit ( GPGPU ) product based on the NVIDIA Fermi architecture, and a 10 Gigabit Ethernet real-time sensor interface module for radar signal processing applications ...

    Online Articles

    Online Articles

    Thu, 26 May 2011

  4. 3U VPX rugged graphics board with NVIDIA CUDA GPGPU for military embedded systems introduced by GE

    HUNTSVILLE, Ala., 16 May 2012. GE Intelligent Platforms in Huntsville, Ala., is introducing the GRA112 3U VPX rugged graphics board for demanding graphical applications that require a general-purpose graphics processing unit ( GPGPU ), such as intelligence, surveillance, and reconnaissance (ISR), ...

    Online Articles

    Online Articles

    Wed, 16 May 2012

  5. GPGPU processor and 10-Gigabit Ethernet embedded computing boards for radar processing introduced by Mercury

    CHELMSFORD, Mass., 26 May 2011. Mercury Computer Systems Inc. in Chelmsford, Mass., is introducing a general-purpose graphics processing unit ( GPGPU ) product based on the NVIDIA Fermi architecture, and a 10 Gigabit Ethernet real-time sensor interface module for radar signal processing applications ...

    Online Articles

    Online Articles

    Thu, 26 May 2011

  6. GPGPU Hyperspectral Imaging

    NVIDIA GPUs can be used to accelerate ISR sensor processing applications with their massively parallel CUDA architecture. This video utilizes GE's GRA111 (see also NPN240 and IPN250 equivalents) in a Hyperspectral Imaging (HSI) material classification & analysis tool, achieving a 60x increase in ...

    Company Microsite Video

    Company Microsite Video

    Fri, 19 Sep 2014

  7. GPGPU processors for high-performance embedded computing

    General-purpose graphics processing units -- GPGPUs for short -- are revolutionizing high-performance embedded computing. These processors, designed originally for graphics and image processing, essentially are massively parallel processing engines that aerospace and defense systems designers are ...

    Online Articles

    Online Articles

    Thu, 23 May 2013

  8. Curtiss-Wright Controls introduces first Nvidia GPGPU OpenVPX engine

    ASHBURN, Va., 4 July 2011. Curtiss-Wright Controls Embedded Computing (CWCEC), a business group of Curtiss-Wright Controls and a designer and manufacturer of commercial off-the-shelf (COTS) VME, VPX, OpenVPX, and CompactPCI products for the rugged aerospace and defense applications, has introduced ...

    Online Articles

    Online Articles

    Mon, 4 Jul 2011

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