Synova offers rad-hard R3000-compatible microprocessor

MELBOURNE, Fla. - Engineers at Synova Inc. in Melbourne, Fla. have designed a radiation-hardened single-chip microprocessor that is hardware- and software- compatible with the MIPS R3000 32-bit reduced instruction set computer architecture.

By John McHale

MELBOURNE, Fla. - Engineers at Synova Inc. in Melbourne, Fla. have designed a radiation-hardened single-chip microprocessor that is hardware- and software- compatible with the MIPS R3000 32-bit reduced instruction set computer architecture.

The Synova processor, the Mongoose V, is based on the LR33 300 processor from LSI Logic Corp. in Milpitas, Calif., says Frank Thomas, a chip design engineer at Synova. "It is a port of a commercial R3000 core and is fabbed on the silicon on insulator product line from Honeywell Space Systems in Clearwater, Fla. This fab line means not only space-qualified parts but also radiation hardness.

The Mongoose V is machine-code compatible with the MIPS R3000, "which means most off-the-shelf assemblers/compilers work out of the box," Thomas adds. Sponsoring the device`s development were officials of the NASA Goddard Space Flight Center in Greenbelt, Md.

Synova officials formed a relationship with MIPS Technologies in Mountain View, Calif., and with LSI Logic, to radiation-harden their commercial off-the-shelf (COTS) products and make them compatible with commercial software, says Bert Schmidt, business development manager at Synova. "We took a common intellectual property and validated it into the rad-hard world."

The device is for spacecraft applications such as embedded instrument controllers. Mongoose-V incorporates on-chip cache memory, on-chip peripheral functions, and hardware support for IEEE-754-standard floating-point arithmetic functions.

Engineers can use the Synova device to form a complete rad-hard computer by adding local memory and system-specific interface logic, Thomas says.

The Mongoose V is different from Manassas-based Lockheed Martin Federal Systems` Rad6000. Synova engineers radiation harden the LSI chip at the netlist level. Conversely, engineers from Lockheed radiation harden their RAD6000 32-bit RISC microprocessor at the transistor level by copying the mask of the circuitry, Schmidt says.

The netlist level is where the gates connect on a chip, he explains. What Synova did is change the metal interconnects that connect gates, thereby retaining radiation-hardness, Schmidt claims.

The Mongoose V`s radiation hardness ranges from 100 kilorads to 1 megarad for total dose, a single event upset will occur only about once every 100 years, Schmidt says.

The Mongoose V "is not a captive product that you can only get if you buy a board or system from us," Thomas explains.

Spacecraft engineers have designed the Mongoose V into several space projects including the 3-MAP satellite from NASA Goddard Space Flight Center, the EO-1 satellite from NASA Goddard and Swales Aerospace in Beltsville, Md., and the TIMED satellite developed at the Johns Hopkins University Applied Physics Laboratory in Baltimore.

Engineers at Litton Amecom in College Park, Md., and Honeywell Space Systems have also developed board-level products that use the Mongoose V, Schmidt says.

"Our approach to the space processor problem was to provide a single-chip solution whose core was as similar to the commercial product as possible," Thomas says. "We wanted to be as COTS-like as you could be while still addressing the special issues of the space community, particularly radiation hardness.

"We are currently planning follow-on versions of the chip," Thomas continues. "We plan a series of speed enhancements to the basic processor, as well as some customer-specific chips in which the processor is a core around which customer-specified logic is added."

Possible speed enhancements include shrinking gate size on the chip by over etching it, and providing greater speed by limiting the environmental specifications on the chip, Thomas says.

Features of the device include a MIPS R3000 instruction set; MIPS R3010 floating-point unit; on-chip 2-kilobyte data cache; on-chip 4-kilobyte instruction cache; speed grades of 10 MHz and 15 MHz; and a 256-pin quad-leaded chip carrier. On-chip caches provide high-bandwidth memory access to keep the CPU operating efficiently.

The on-chip peripherals include error detection and correction, memory protection, timers, Dual UART, expansion interrupts, wait-state generator, and a dynamic RAM controller.

For more information on the Mongoose V and Synova, contact Bert Schmidt by phone at 407-728-8831, by fax at 407-728-9587, by mail at Synova, Inc., 1333 Gateway Drive, Suite 1017, Melbourne Fla., 32901, or on the World Wide Web at http://www.synova.com.

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