Signal processor combines DSP and multi-channel communications

HOUSTON, 27 June 2005. VMETRO in Houston is offering the the 3CPF1 signal-processing engine that combines the Xilinx Virtex-II Pro field programmable gate array (FPGA), a Freescale PowerPC central processor, and multi-channel communications in a rugged 3U board.

HOUSTON, 27 June 2005. VMETRO in Houston is offering the the 3CPF1 signal-processing engine that combines the Xilinx Virtex-II Pro field programmable gate array (FPGA), a Freescale PowerPC central processor, and multi-channel communications in a rugged 3U board. This signal processor is for applications that require complex signal processing closely coupled to high-bandwidth data I/O in tight spaces, such as optoelectronics, signals intelligence, and electronic warfare. Using FPGAs for signal processing can increase speed such that an fast Fourier transform can be calculated 10 to 20 times faster on an FPGA than on a PowerPC general-purpose processor. Six independent banks of memory are included, four banks of 2M x 18-bit QDR-II SRAM and two banks of 64-megabyte DDR SDRAM. The board eliminates off-board data I/O bottlenecks with eight 3.125-gigabit-per-second RocketIO serial channels, a high-bandwidth backplane connector, and parallel I/O, all coupled to the FPGA. The 3CPF1 usesthe VxWorks real-time operating system, while Linux support is in development. For more information contact VMETRO online at www.vmetro.com.

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