Upper Saddle River, NJ - December 12, 2016 - Pentek, Inc., today introduced the newest member of the Jade" family of high-performance data converter XMC FPGA modules. The Jade Model 71841 is available as a 1-channel, 3.6 GHz 12-bit A/D or 2-channel, 1.8 GHz 12-bit A/D XMC module based on the Xilinx Kintex Ultrascale FPGA
Performance IP Cores
The Model 71841 comes preconfigured with a suite of built-in functions for data capture, synchronization, time tagging and formatting, making it an ideal turn-key interface for radar, communications or general data acquisition applications. The Model 71841 features an A/D acquisition IP module and a programmable DDC for easy data capture and moving. Single-channel mode decimation can be programmed to 8, or 16 to 512 in steps of 16. Dual-channel mode decimation can be programmed to 4, or 8 to 256 in steps of 8, with both channels sharing the same decimation rate. In dual-channel mode, each DDC has an independent 32-bit tuning frequency setting ranging from DC to the A/D sampling frequency.
"The Model 71841 significantly boosts the performance, with considerable savings in power consumption, cost and weight," said Bob Sgandurra, Director of Product Development of Pentek. "Our customers are excited to take advantage of the Jade Architecture and our new Navigator tool suite for their next development project."
A/D Converter Stage
The front end accepts analog HF or IF inputs on a pair of front panel SSMC connectors with transformer coupling into a Texas Instruments ADC12D1800 12-bit A/D. The converter operates in single-channel interleaved mode with a sampling rate up to 3.6 GHz and an input bandwidth of 1.75 GHz; or, in dual-channel mode with a sampling rate up to 1.8 GHz and input bandwidth of 2.8 GHz. The full scale input level can be digitally trimmed from +2 dBm to +4 dBm to simplify system calibration. A built-in synchronization feature supports A/D synchronization across multiple modules.
Breakthrough Performance with the Jade Architecture
Evolved from proven designs of the Pentek Cobalt® and Onyx® architectures, the Jade architecture is based on the Xilinx Kintex UltraScale FPGA, which raises the digital signal processing (DSP) performance by over 50%. Equally impressive are reductions in cost, power dissipation, and weight.
As the central feature of the Jade architecture, the FPGA has access to all data and control paths, enabling factory-installed functions including data multiplexing, channel selection, data packing, gating, triggering and memory control. Jade supports a 5 GB bank of DDR4 SDRAM memory for data buffering or for custom applications. The memory to Gen.3 x8 PCIe link can sustain 6.4 GB/s data transfers, a 20% improvement over the Onyx architecture. Eight additional gigabit serial lanes and LVDS general purpose I/O lines are available for custom solutions.
Navigator Design Suite Efficiencies Streamline IP Development
Penteks Navigator" Design Suite was designed from the ground up to work with Penteks Jade architecture and Xilinxs Vivado Design Suite® providing an unparalleled plug-and-play solution to the complex task of IP and control software creation and compatibility. The Navigator Design Suite consists of two components: Navigator FDK (FPGA Design Kit) for integrating custom IP into Pentek sourced designs and Navigator BSP (Board Support Package) for creating host applications. Users can work efficiently at the API level for software development and with an intuitive graphical interface for IP design.
Penteks Navigator FDK provides complete data acquisition and processing IP. When the design is opened in Vivados IP Integrator, the developer can access every component of the Pentek design, replacing or modifying blocks as needed for a specific application. All blocks use industry standard AXI4 interfaces providing a well-defined format for custom IP to connect to the rest of the design. In addition to the IP specific to the supported Jade board, Navigator also includes processing blocks for some of the most commonly used algorithms.
Navigator BSP enables complete operational control of the hardware and all IP functions in the FPGA. It provides a well-defined API, allowing developers to create their applications at a high level of abstraction. Built on C-language libraries, it contains a complete suite of initialization, control and status functions, as well as a rich set of precompiled, ready-to-run-examples. Navigator BSP also includes the Signal Viewer, a full-featured analysis tool that displays data in time and frequency domains. The Pentek Navigator BSP is available for Windows and Linux operating systems.
Pre-Configured SPARK System Ready for Immediate Use
With a Pentek 8266 SPARK® PC, 8264 SPARK 6U VPX, or 8267 SPARK 3U VPX development system, work can begin immediately on applications. A SPARK system saves engineers time and expense associated with building and testing a development system and ensures optimum performance of Pentek boards. SPARK development systems are ready for immediate operation with software and hardware installed. In many applications, the SPARK development system can become the final deployed application platform.
The Model 71841 XMC module is designed to operate with a wide range of carrier boards in PCIe, 3U & 6U VPX, AMC and 3U & 6U CompactPCI form factors, with versions for both commercial and rugged environments.
Pricing and Availability
For the latest pricing, delivery and available options, please fill out this form and your request will be delivered to the appropriate department. To learn more about our products or to discuss your specific application please email our sales department at [email protected], contact your local representative or Pentek directly:
One Park Way
Upper Saddle River, NJ 07458
Tel: +1 (201) 818-5900
Fax: +1 (201) 818-5904
Map + Directions