Silterra and Novelics demonstrate low-power coolSRAM-1T

KULIM, Malaysia, 21 March 2007. Memory design specialist Novelics and Silterra Malaysia Sdn. Bhd. have demonstrated Novelics' coolSRAM-1 ultra-high-density memory intellectual property in Silterra's 0.13-micron CMOS process. This memory is substantially smaller than those commonly implemented in today's system-on-chip (SoC) designs, resulting in significant cost savings for a wide range of end products.

Mar 21st, 2007

KULIM, Malaysia, 21 March 2007. Memory design specialist Novelics and Silterra Malaysia Sdn. Bhd. have demonstrated Novelics' coolSRAM-1 ultra-high-density memory intellectual property in Silterra's 0.13-micron CMOS process. This memory is substantially smaller than those commonly implemented in today's system-on-chip (SoC) designs, resulting in significant cost savings for a wide range of end products.

Based on Novelics' patented memory architecture, coolSRAM-1T is a memory subsystem that includes the cell arrays, associated logic, and self-refresh circuitries, making it a drop-in solution.

The coolSRAM-1T is generated by Novelics' MemQuest memory compiler to provide high flexibility, productivity, and efficiency. The compiler can generate any macro size and configuration.

Customers can benefit from coolSRAM-1T to reduce die size and cost. Novelics' coolSRAM-1T memory IP can offer more than double the density of traditional SRAM blocks. coolSRAM-1T's architecture also reduces leakage power consumption.

Silterra's CL130G, a foundry matched CMOS technology, is an all-copper process with fully characterized mixed-signal and RF options.

More in RF/Analog