6U VPX card set for EW, SIGINT, and digital radio processing introduced by Curtiss-Wright
ASHBURN, Va., 28 Jan. 2012. Curtiss-Wright Controls Defense Solutions in Ashburn, Va., is introducing the 6U VPX CHAMP-WB Xilinx Virtex-7 digital signal processing (DSP) embedded computer and TADF-4300 companion module, which together form the CHAMP-WB-DRFM for sense-and-response applications such as electronic warfare (EW) that require high bandwidth and minimal latency.
ASHBURN, Va., 28 Jan. 2012. Curtiss-Wright Controls Defense Solutions in Ashburn, Va., is introducing the 6U VPX CHAMP-WB Xilinx Virtex-7 digital signal processing (DSP) embedded computing board and TADF-4300 companion module, which together form the CHAMP-WB-DRFM for sense-and-response applications such as electronic warfare (EW) that require high bandwidth and minimal latency.
The TADF-4300 has 12.5-gigabit-per-second A/D converters and D/A converters from Tektronix Component Solutions in Beaverton, Ore. Combined these two modules provide high bandwidth and high resolution for wideband digital radio frequency memory (DRFM) processing, delivering 12.5-gigabit-per-second 8-bit A/D performance, as well as and 12.5-gigabit-per-second 10-bit D/A performance from one 6U slot.
The rugged 6U card set results from Curtiss-Wright's partnership with Tektronix Component Solutions. The two companies developed the TADF-4300 module together. The CHAMP-WB-DRFM card is based on the Tektronix silicon germanium (SiGe) based data converters.
As a stand-alone card, the CHAMP-WB is for applications that need large amounts of I/O bandwidth and FPGA processing, and minimal delay, such as direct RF digitization, ground-penetrating radar (GPR), coherent optical applications, digital radio frequency memory, electronic warfare, signals intelligence, and electronic countermeasures.
The card supports standard Virtex 7-compatible FPGA mezzanine cards (FMCs) and high-throughput modules such as the TADF-4300, and couples the dense processing resources of one large Virtex 7 FPGA with two high-bandwidth enhanced FMC mezzanine sites on a rugged 6U OpenVPX (VITA 65) form factor module.
The TADF-4300 module also can operate in a dual-channel 6.25-gigabit-per-second A/D converter-only or D/A converter-only mode. The module contains built-in clock generation and calibration logic for maintaining optimal performance in different environments and over temperature.
The CHAMP-WB's data plane connects to the FPGA with support for Gen2 Serial RapidIO (SRIO) data plane fabric. Alternate fabrics also can be supported with different FPGA cores. A Gen3 PCI Express switch connected to the board's expansion plane enables one host card to control several CHAMP-WB cards without using data-plane bandwidth.
Memory support on the CHAMP-WB includes two 64-bit 4-gigabyte DDR3L memory banks that provide as much as eight gigabytes of on-card data capture or pattern generation capability.
The CHAMP-WB has two high-bandwidth FMC sites that have been enhanced with an auxiliary connector to provide additional I/O capability. Twenty back-plane SERDES links, which can operate at speeds as fast as 10.3 gigabits per second, and 16 LVDS pairs provide additional I/O capability.
The TADF-4300 module supports sampling in the 2nd nyquist zone, to analyze signals as high as 8 GHz and provides sub-30-nanosecond latency for the A/D converter and sub 10 nanoseconds for the D/A converter.