Multichannel data converter for communications and radar processing introduced by Pentek

UPPER SADDLE RIVER, N.J., 17 Oct. 2011. Pentek Inc. in Upper Saddle River, N.J., is introducing the model 71651 multichannel data converter for communications and radar-processing applications. The 71651, based on the Pentek Cobalt family of Express Mezzanine Cards (XMC), is based on the Xilinx Virtex-6 field-programmable gate array (FPGA), and has digital down and up converters. The 71651 has two channels each of 12-bit, 500 MHz A/D and 16-bit, 800 MHz D/A. The FPGA is preconfigured with data acquisition and playback IP to give the module turn-key functionality, with user customization available. The model 71651 embedded computing digital signal processor has two input and two output RF channels, transformer-coupled to connect to HF or IF radio stages. The input channels have 12-bit, 500 MHz A/Ds that feed data into the FPGA.

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UPPER SADDLE RIVER, N.J., 17 Oct. 2011. Pentek Inc. in Upper Saddle River, N.J., is introducing the model 71651 multichannel data converter for communications and radar signal processing applications. The 71651, based on the Pentek Cobalt family of Express Mezzanine Cards (XMC), is based on the Xilinx Virtex-6 field-programmable gate array (FPGA), and has digital down and up converters.The 71651 has two channels each of 12-bit, 500 MHz A/D and 16-bit, 800 MHz D/A. The FPGA is preconfigured with data acquisition and playback IP to give the module turn-key functionality, with user customization available.The model 71651 embedded computing digital signal processor has two input and two output RF channels, transformer-coupled to connect to HF or IF radio stages. The input channels have 12-bit, 500 MHz A/Ds that feed data into the FPGA. The output channels incorporate a Texas Instruments DAC5688 digital upconverter that translates real or complex baseband signals to any IF frequency to 380 MHz. Dual 16-bit, 800 MHz D/As create real or in-phase (I) and quadrature (Q) analog outputs.The 71651 has a beamforming subsystem. Each DDC core contains programmable I and Q phase and gain adjustments followed by a power meter that continuously measures the individual average power output and performs threshold detection. A programmable summation block handles any of the three DDC core outputs.

The D/A waveform playback module provides a linked-list controller so users can deliver waveforms stored in on-board or host memory to the D/As. Users can chain together as many as 64 individual link entries to create complex waveforms. Parameters for each waveform include length of waveform, delay from playback trigger, waveform repetition, plus the link to the next waveform.

Users can also implement their own IP in the 71651's FPGA using Pentek's GateFlow FPGA design kit. Boards can be populated with a variety of FPGAs to match the specific requirement of the processing task.

Pentek's ReadyFlow Board Support package for Windows, Linux, or VxWorks operating systems includes C-callable libraries, drivers, and example code. The Signal Analyzer has a virtual oscilloscope and spectrum analyzer. A command line interpreter enables users to change module parameters to check operation and performance on the signal analyzer without compiling C code.

For more information contact Pentek online at www.pentek.com.

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