The Altera/Eutecus single-chip surveillance solution is based on the Altera Cyclone IV FPGA and the Eutecus Multi-Core Video Analytics Engine (MVE) intellectual property (IP), which performs the analytics functions in the FPGA. The surveillance system offers throughput of 60 megapixels per second with pixel precision detail not possible with traditional digital signal processing (DSP)-based approaches, Altera officials say.
The solution can be integrated into HD Internet protocol cameras, and enables the user to track dozens of user-defined rules. Users can define rules, configure alerts, and remotely update rules for events they want detected, such as a person entering a room or a restricted area in an airport terminal or a building entrance.
Altera's Cyclone IV FPGAs enable users to customize their applications with the Eutecus MVE IP that combines massively parallel algorithms and coprocessors with several Altera Nios II cores integrated into a Cyclone IV FPGA. It also comes with a software graphic user interface that enables designers to customize the event-detection parameters and rules.