SOSA-aligned embedded computing chassis manager for maintenance and security introduced by Annapolis

April 12, 2021
The WABGM0 aligns with the Sensor Open Systems Architecture (SOSA) open-systems standard, and offers commercial-off-the-shelf (COTS) availability.

ANNAPOLIS, Md. – Annapolis Micro Systems Inc. in Annapolis, Md., is introducing the WABGM0 VITA 46.11-aligned WILD VPX chassis manager to enable critical chassis control, maintenance, and security functions in embedded computing systems.

Annapolis Micro developed the WABGM0 in alignment with the Sensor Open Systems Architecture (SOSA) open-systems standard, and offers commercial-off-the-shelf (COTS) availability.

For security, the chassis manager implements security signal interfaces and a Xilinx UltraScale+ Zynq ZU5EG MPSoC and latest Microsemi PolarFire FPGA. Other chassis manager features include MIL-STD-1553 support and an additional storage flash.

The chassis manager plugs directly into a backplane or into a 3U or 6U OpenVPX carrier that plugs into a backplane as a payload card. It supports VITA 66/67 by avoiding optical/RF backplane openings.

Related: 3U OpenVPX embedded computing chassis to help develop SOSA-aligned systems introduced by Annapolis Micro

The chassis manager supports the SOSA management interface for all the cards in the chassis, allowing for controlled power-on/off of VPX cards and controlling main 12-volt power to the chassis with local Ethernet control. The management interface also allows out-of-band monitoring of board health and statistics like board temperature and power.

The system allows for access to as many as four slots in parallel so the user can access maintenance ports over Ethernet without opening the chassis. It also allows access to JTAG for as many as four slots at a time, which allows board maintenance and recovery without removing boards from the chassis.

Additionally, the chassis manager supports many general-purpose I/O for chassis functions or can be converted on the backplane to RS-422 for external communication. It also supports the VPX CLK1 LVDS pin, which can be used for an additional GPIO and goes to the Zynq FPGA.

For more information contact Annapolis Micro Systems online at www.annapmicro.com.

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