VME interface to be implemented on FPGAs

MINNEAPOLIS — Experts at Silicore are solving obsolescence problems for system designers by synthesizing VMEbus interfaces on field programmable gate arrays (FPGAs) and ASICs through soft intellectual property (IP) core sets in VHDL code description — called VMEcore toolsets.

By John McHale

MINNEAPOLIS — Experts at Silicore are solving obsolescence problems for system designers by synthesizing VMEbus interfaces on field programmable gate arrays (FPGAs) and ASICs through soft intellectual property (IP) core sets in VHDL code description — called VMEcore toolsets.

The VMEcore enables designers to create a VMEbus hardware interface with system-on-a-chip technology, says Wade Peterson, president of Silicore in Minneapolis, and designer of the VMEcore toolset.

Peterson and his colleagues buy the IP core, write the product`s specifications in VHDL, store the description on a CDROM, then synthesize the technology onto a FPGA or ASIC, he explains. VHDL stands for VHSIC Hardware Description Language.

It solves the obsolescence problems designers face when IC manufacturers quit making the silicon they depend on, Peterson claims. Now, instead of doing a lifetime buy, they can have their VME architecture and IP core in VHDL on CDROM, and can port from one product to another, he says.

This is of interest for military systems designers and systems upgraders, where design-ins last three to five years and the product needs to have a lifecycle of 20 years, Peterson says. Radiation-hardened parts are also available for military and aerospace designers, he adds.

Just like a C compiler compiles C-code to run on Unix, the VMEcore toolset synthesizes the VME interface onto a FPGA, Peterson explains.

What is making the VMEcore toolset applications possible is the advancement of technology in VHDL and FPGAs, Peterson says. FPGAs are sophisticated enough now that they can hold a lot of data, he adds. Some companies are marketing 500,000 gate devices and getting ready to release 1 million gate products, Peterson says.

It is already happening in the digital signal processing (DSP) world, Peterson says. DSP users buy the DSP core, then integrate the technology on their own silicon, he explains.

Peterson`s technology is the harbinger of things to come, says Ray Alderman, executive director of the VME International Trade Association (VITA) in Scottsdale, Ariz. So-called "soft hardware" is going to be one of the main ways designers will combat obsolescence in the future, he says.

The soft hardware/IP core market is in its "Wild West stage like the software industry was in 1978 and 1979," Peterson says.

The portable IP core set has the following features:

The Silicore IP core supports all interfaces in ANSI/VITA 1-1994 (VME64), VMEbus bandwidth to 40/80 megabytes per second, ensures compliance with the VMEbus standard, and uses third-generation synchronous interface technology. It also works with the Wishbone local interface, which is a synchronous memory style interface, and supports memory mapped, FIFO, and shared memory interfaces.

The VHDL IP core conforms to VHDL IEEE 1076-93, 1073.3 and 1164-93 and is portable across VHDL synthesis tools and across multiple silicon technologies.

The release date for the VMEcore tool set has not been established, Peterson says.

For more information on the VMEcore or Silicore contact Wade Peterson by phone at 612-722-3815, by fax at 612-722-5841, by mail at Silicore, 3525 East 27th Street, Suite 301, Minneapolis, Minn. 55406, or on the World Wide Web at http://www.silicore.net.

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