Engineers balance speed and heat in a single board

March 1, 2006
Processors and switched-fabric networks are moving data at faster speeds then ever before, which is leading designers to come up with innovative approaches to channeling information flow, power management, and keeping boards cool.

Processors and switched-fabric networks are moving data at faster speeds then ever before, which is leading designers to come up with innovative approaches to channeling information flow, power management, and keeping boards cool.

By Ben Ames

Engineers are trying to balance increasing speed and rising heat as they boost the performance of single-board computers. They often use combinations of dedicated processors and field-programmable gate arrays (FPGAs), as well as commercial electronics like the powerful Cell processor and other multi-core integrated circuits (ICs).

One tool in their box is high-speed switched serial fabrics, which enable designers to distribute computing tasks to many processors or boards.

Distributed processing does more than share the workload and spread the heat; it also enables designers to build fault tolerance into a system, allowing it to route automatically around failed components. It also helps designers migrate from the 6U to 3U board size to improve immunity to shock and vibration while fitting inside ever-smaller spaces, such as those aboard unmanned aerial vehicles (UAVs).

Facing an array of choices for different fabrics, many manufacturers have released fabric-agnostic boards, which help each designer to choose his favorite technology. Until companies develop an industry standard for liquid cooling, that approach also will enable engineers to work within their heat budgets for each application.

Fast chips need fast pipes

Designer demand for fast single-board computers is always growing. To meet it, designers can choose a balance of speedy digital signal processors (DSPs), general-purpose processors, and the fast and flexible FPGAs. Whatever their choice, it leads to another challenge-faster processors demand faster pipes to deliver data to the board.

The designer community has not yet settled on a standard solution, so engineers are left with a choice between competing fabrics, says Dave Barker, vice president for business development at VMETRO Inc. in Houston. PCI users can now upgrade to PCI Express, which offers faster speed at the cost of limiting the number of devices you can attach, he says. Others have been waiting for Serial Rapid IO, which is finally available today on silicon.

Curtiss-Wright’s new VPX6-185 is a 6U VPX board with ESD covers to allow field-level maintenance.
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Faster processors also mean that designers need faster data pipes between single-board computers. Many designers use solutions such as Serial FPDP, Ethernet, Fibre Channel, Race ++, and Star Fabric. Other designers use a direct connection to the backplane, running a low-level, point-to-point protocol like Aurora or Serial FPDP, Barker says. The sweet spot for that kind of design is three to five 6U VME boards in a system, yet some designers push the limits by refusing to upgrade to a high-level, fabric protocol because of the extra overhead.

The latest open VME standard, VITA 41 (VXS), could solve two problems at once-offering efficient I/O and dissipating heat, Barker says. VMETRO’s Phoenix VPF1 board dissipates 90 to 100 watts, which is typical for high-end embedded DSP applications like signals intelligence, electronic intelligence, radar, lidar, electronic warfare and countermeasures, signal jamming, image processing, and software-defined radio, he says.

“Cooling used to be a problem for the mechanical engineers, but now cooling is sexy. It’s a big issue,” Barker says. For instance, in January, engineers at BAE Systems in Nashua, N.H., chose VMETRO to supply digital signal-processing boards for the U.S. Army’s Airborne Reconnaissance-Low (ARL) Crazy Hawk communications intelligence upgrade program. ARL uses the RC-7B, a converted DeHavilland “Dash-7” four-engine turboprop airplane, to carry a communications intercept and direction-finding payload.

The SCP/DCP-124 from Curtiss-Wright is a 3U CompactPCI single-board computer, powered by a Freescale PowerPC processor, and designed for space-constrained mil-itary and aerospace applications.
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According to the $850,000 contract, VMETRO will supply two types of components: the Phoenix VPF1 dual PowerPC, dual Virtex-II Pro FPGA VME/VXS digital signal processors and PMC-FPGA02 Xilinx Virtex-II FPGA PMC Modules. The VPF1 and PMC-FPGA02 boards will run the signal-processing algorithm as well as perform real-time processing of the sensor data.

In another application, engineers at Northrop Grumman’s Integrated Systems Division in Melbourne, Fla., picked VMETRO in February to supply the central electronics chassis (CEC) system of the Airborne Laser Mine Detection System (ALMDS).

Navy helicopter pilots use ALMDS to detect mines at or near the water’s surface. The CEC processes image-sensor data in a liquid cooled system incorporating several VMETRO Phoenix VPF1 quad processor payload cards and the CSW1 zero latency switch card. It relies on the Phoenix family of VXS (VITA-41) real-time multiprocessing systems with high-speed serial communications. The entire contract is worth a potential $15 million, with delivery of systems to begin during the first half of 2006.

Boards fit in tight spaces

Manufacturers see rising demand for high-performance single-board computers in weight- and space-constrained spaces, ranging from UAVs to helicopters and tanks. That is why the early adopters of VXS technology will be involved with applications in radar processing and mission computing. Such tasks move beyond pure processing, adding high-end I/O connectivity to add graphics content to share data in the net-centric battlefield.

The problem with using traditional 6U VME boards for such jobs is meeting shock and vibration standards as well as heat dissipation, says Stewart Dewar, product marketing manager at Curtiss-Wright Controls Embedded Computing in Leesburg, Va.

“That is becoming an issue with VME. Our new Champ AV6 with four 8641 processors and eight banks of memory, takes more power than VME is designed to handle,” Dewar says. That board needs 90 watts of five-volt power (or 60 watts of 3.3-volt power). “Fortunately, VPX offers the extra headroom to handle that.”

The new technology comes just in time. Many VITA 46 products have gone to a fabric-agnostic design, offering fabric choices (known as “dot” specs) within a basic framework. “But at the end of the day, you have to pick a fabric; you can’t just offer seven options,” Dewar says. “We’ve made some choices: for dense, multicomputing products like our Champ series, Serial Rapid IO is best for integrating clusters of boards together. For general-purpose computing integrated with graphics and I/O cards, PCI Express is best, with its large support on the I/O side for jobs like mass storage. For single-board computers, we went with Advanced Switching Interconnect, which is similar to PCI Express, but with extra protocol for peer-to-peer operations.”

VMETRO designed its Phoenix VPF1 VME/VXS DSP board with dual PowerPCs and dual FPGAs to meet demand for real-time embedded applications.
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Curtiss-Wright will release the VPX6-185 by the third quarter of 2006. The board also will offer an option for VITA 48-the so-called Ruggedized Enhanced Design Implementation (REDI) standard that enhances ruggedization, power dissipation, and offers a level of field-assembly called two-level maintenance. In fact, the Champ AV6 is available only with REDI extension because it needs those power dissipation abilities to handle its quad PowerPC microprocessors.

Curtiss-Wright is still continuing its commitment to VME64x, but compared to that standard, VPX doubles the capacity of a backplane over the same pin count, and offers 6-gigabyte-per-second bandwidth-enough to support high-speed switched serial fabric technology, he says. VPX also will let designers shrink board sizes from 6U to 3U for greater density and durability.

Curtiss-Wright unveiled in January the SCP/DCP-124, a high-performance, ruggedized 3U CompactPCI single-board computer. Powered by Freescale’s 7447A/7448 PowerPC processor, and available in conduction- and air-cooled versions, the card simplifies the design of space- and weight-constrained COTS systems for military and aerospace applications.

Also in January, Curtiss-Wright introduced the CHAMP-AV6, a VITA 46 (VPX)-based digital signal-processing (DSP) engine. The 6U CHAMP-AV6 combines quad PowerPC 8641 devices with the serial-switched-fabric capabilities made possible by VPX.

The VPX standard delivers a high-speed serial interconnect with a form factor and feature set designed to meet demanding military and aerospace applications. The VPX format provides backplane connectors capable of handling signaling speeds as fast as 6.25 gigabits per second, easily enough to support the 2.5-gigabits-per-second signaling rate of the board’s Serial RapidIO ports and to enable multigigabit-per-second I/O to be handled from its XMC mezzanine card site.

The CHAMP-AV6 features four on-board 8641 single-core PowerPC devices. The 8641, FreeScale’s latest Altivec-enabled processor, has dual integrated 64-bit memory controllers and offers vastly increased memory performance compared to prior generations of PowerPC processors.

Multiprocessor systems based on the CHAMP-AV6 will benefit from the 10-gigabyte-per-second full duplex bandwidth provided by the board’s four Serial RapidIO ports; this represents a data throughput rate approximately 10 times faster than today’s best VME/StarFabric implementation. Streaming data applications will benefit from the board’s 8.5-gigabyte-per-second memory bandwidth and up to 2 gigabytes of DDR-II SDRAM.

Also using the Freescale 8641 PowerPC processor, Curtiss-Wright released the VPX6-185 single-board computer, a 6U VPX-based unit with two PCI Express VITA 42 XMC/PMC sites, with features including Gigabit Ethernet (GbE), serial ports, and mass-storage interface options.

For core backplane connectivity the VPX6-185 incorporates four Advanced Switching Interconnect (ASI) switch ports. ASI is based on PCI Express and extends PCI Express with peer-to-peer message passing protocols to provide efficient, low-latency inter-processor communications.

Army pilots in the RC-7B Crazy Hawk use the VMETRO Phoenix VPF1 quad processor SBC for communications intercepts and eavesdropping.
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The VPX6-185’s four ASI ports together provide a nominal 8-gigabytes-per-second backplane bandwidth, sufficient to handle challenging data-throughput requirements such as multiple streams of sensor, video, or receiver data. For integration with high-density computing products such as the CHAMP-AV6, the VPX6-185 also provides Serial RapidIO connectivity.

The VPX connectors also include an electrostatic-discharge (ESD) protection mechanism that, when coupled with top and bottom covers at the module level, enable safe handling of the VPX6-185 in flight-line environments where standard ESD precautions are not practical. The VPX6-185 (along with the CHAMP-AV6 DSP engine) represents the industry’s first single-board computer support for two-level, in-the-field maintenance requirements, which allows soldiers to add or replace modules to a board without returning to a computer lab.

Faster processors enable new standards

While these new VITA standards do not solve speed and heat problems, they give engineers the tools to do it. “The chips we need are finally coming. The ChampAV6 needed a Serial Rapid IO switch chip, now made by Tundra,” Dewar says.

Likewise, the Freescale 8641 processor due out soon will have a high level of integration, dual-core G4-class processors on the same die, integrated memory (like Intel’s Opteron chip), and built-in PCI Express and Serial Rapid IO, both running at least at 2.5 gigabits per second. “The 8641 lets you do more for less in terms of weight, volume, and power,” Dewar says.

VPX is important for another reason-it lets engineers keep up with other high-speed applications such as a mass storage system using Fibre Channel or Serial ATA, sensor data applications on Serial FPDP or RocketIO, or digital video applications that can reach 1.5 or 2 gigabits per second.

That is the reason Curtiss-Wright plans to announce an XMC module by the third quarter of 2006, meant for high-speed graphics applications. “XMC has been in development a while, but there has been only a smattering of products on the market. Compared to PMC standard, XMC with a PCI Express option will be a breath of fresh air for those doing high-speed I/O, like radar,” Dewar says.

Anticipating a rush to VPX, Radstone Embedded Computing in Billerica, Mass., announced its commitment to developing both VME and VPX (VITA 46) products, to integrated bridge processor architectures such as the MPC 8641 and to the 3U form factor.

Specifically, Radstone officials say they believe the benefits to customers of VPX include five points: compatibility with VME, easier migration of legacy systems via hybrid chassis, high-speed I/O, access to switched fabrics, and two-level maintenance.

Company leaders expect the 3U form factor to become increasingly important in the future as a result of the rapidly increasing demand for systems that are small, light, and consume little power. In addition, integrated bridge-processor architectures will deliver the functionality density to allow 3U solutions to achieve levels of performance previously only thought possible with 6U solutions.

Radstone will announce a range of VPX single-board computers soon (including multiprocessor products), graphics processors, Ethernet switches, and software-defined radio blade computers based on the 3U form factor.

Remember Ethernet

“We used to see a new fabric every week or month, but now the market is settling down. Fabrics are moving from Power point slides to real deployment,” says Joe Pavlat, president of the PCI Industrial Computing Manufacturers Group (PICMG).

As engineers begin moving from parallel backplane to fabric-based designs, they have realized that military and civilian communications platforms are not so different anymore. “The goal of sending ‘any data to any soldier at any time’ is not a whole lot different from a teenage girl talking on her cell phone,” Pavlat says. “Now here comes Gigabit Ethernet. It’s like the ‘Energizer Bunny;’ the Ethernet Bunny keeps going and going…soon PCI Express and Rapid IO will be used only for niche applications.”

Navy pilots in the H-60 helicopter series use Phoenix VPF1 quad processor cards from VMETRO to find mines with the Airborne Laser Mine Detection System.
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The common complaints about Ethernet are its lack of determinism, it is not isochronous (meaning there’s not a known delivery time for each data packet), and it is not applicable for voice or video transmissions. To refute those claims, Pavlat points to the recent growth of Voice Over IP telephony, managed by companies like Vonage and Skype using Ethernet-based Internet connections.

In theory, PCI Express Advanced Switching and Serial Rapid IO should be better than Ethernet for transmitting data such as voice and video, he admits, yet the pure speed of Gigabit Ethernet obviates their advantage.

“If you make the system so much faster than you’ll ever need, and so cheap to build and understand, then it doesn’t matter anymore. People talk about paying an overhead tax for using Ethernet, but TCP Offload Engines (TOEs) take away the overhead problem,” says Pavlat.

In fact, telephony applications highlight a significant trend in single-board computer design-high availability. “When’s the last time you picked up your landline phone and didn’t get a dial tone? It works. That’s not so different from highly distributed networks on the battlefield; you want them to dynamically route around failures,” says Pavlat.

High-speed switch fabrics themselves are not fault-tolerant, but they allow designers to build a better system, and they are scalable, he says. That is the same reason that engineers at Stanford University in Palo Alto, Calif., will run their new linear accelerator with Advanced TCA-single-point reliability is not as important as system-wide availability.

Their goal is not to design a system whose components never fail, but one that recovers quickly when they do. “You can’t say you will never lose a transaction like the banking industry wants, but you can say it will return in milliseconds, not hours or days. And the military needs the same thing now as they move into net-centric warfare,” Pavlat says.

To further that goal, groups like the Service Availability Forum, of Portland, Ore., are developing open standards for high-availability middleware for the Advanced Telecom Computing Architecture (ATCA), as well as next-generation VITA. The industry group includes Motorola, IBM, Nokia, and Hewlett-Packard, as well as Kontron and Wind River. For more information, see

Another group pushing for standards in embedded computing is the Mountain View Alliance (MVA), a consortium dedicated to creating more coordinated approach to specifications and activities around platform design. Members include the RapidIO Trade Association, Network Processing Forum (NPF), PICMG and the Service Availability Forum. For more information, see

Designers integrate boards with fabric

Fabrics enable engineers to deliver systems that are more fault-tolerant, agrees Tom Cox, executive director of the Rapid IO Trade Association. In a long-term trend, engineers are condensing system-level modules from entire boxes onto single-board computers, freeing designers to add more networking with the free space in each chassis.

Where designs used to feature a single-board computer alongside several I/O boards, they now include a cluster of single-board computers. That drives the need for better integration, finally being solved today by fabrics. With their high reliability and low latency, fabrics allow engineers to build redundancy into a system, using dual processors for failover. That type of design is spreading from pure avionics and fire control to commercial applications in industry, banking, and telecom, Cox says.

“It allows military designers to fit more power in a small package, so they are moving applications from the back of the airplane to the back of the Humvee,” Cox says.

“If one processor is too hot for the environment, they can spread the work across four processors and make it look like one with tight integration. Rapid IO is the best way to do this since it offers no bottlenecks; it operates peer-to-peer, so it is so tightly coupled, with no single pinch points.”

Other fabrics would be less efficient, he says. “There’s always a way to do things. It’s always possible to use your shoe to hammer in a nail, but I’d rather buy a hammer.”

Networking feeds the speed

Regardless of which backplane standard you choose, distributed computing calls for strong I/O. That is one motivation for the CE9 6U CompactPCI single-board computer, announced in January by SBS Technologies in Albuquerque, N.M.

Using a 1.8-gigahertz Intel Pentium M processor, the CE9 has system memory with as much as two gigabytes of 333-megahertz DDR SDRAM, with a 400-MHz system bus to processor. This single-board computer can be used in a system or nonsystem slot within a CompactPCI backplane.

SBS Technologies designed its CE9 6U CompactPCI single-board computer, with a 1.8-GHz Intel Pentium M processor, for communications, automation, and rugged multimedia.
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“The CE9 is a cost-optimized 6U CompactPCI SBC designed with a focus on reliability,” says Adrian Bernhard, managing director of SBS Technologies European Operations. “The CE9’s soldered memory, optional extended temperature and conformal coating positions the CE9 not only for traditional applications in the communications and automation industries, but also for rugged applications. The CE9’s audio capability also makes it well-suited for applications with multimedia requirements.”

Providing abundant I/O, the CE9 includes dual Gigabit Ethernet ports, two serial-I/O ports, four USB 2.0 ports, and a CompactFlash or 2.5-inch hard disk. For system designers needing additional I/O capability, the CE9 includes a PMC site that supports the IEEE 1386.1 standard, allowing system designers high flexibility for expanding I/O capability with SBS Technologies’ extensive line of WAN and LAN I/O PMC modules.

Military designers borrow commercial technology

Maximum efficiency is the reason many military designers are borrowing technology from the commercial and telecommunications sectors. That is one reason Mercury Computer Systems in Chelmsford, Mass., has adopted the Cell processor, which was originally designed for Sony’s Playstation 3 video-game terminal.

“The impact of Cell processing is that we can deliver 200 gigaflops in one processor,” says Joey Sevin, director of business development at Mercury. “We’re gathering and fusing information from UAVs, sensors, satellites, weather, and people. This will let a tank commander train in the world existing just over the next hill, before he actually goes there.”

In January, Mercury announced the PowerBlock 200-the third member of its Cell Broadband Engine (BE) processor-based family of hardware products, and the first rugged device designed with the Cell BE processor. The PowerBlock 200 processing appliance is designed to deliver raw compute power. At 200 gigaflops, the processing capacity of the PowerBlock 200 rivals that of 12 to 20 PowerPC processors or 45 Intel Pentium 4 processors-in a COTS-deployable ATR chassis about the size of a toaster.

The PowerBlock 200 contains a single Cell BE processor and has Gigabit Ethernet, Fibre Channel, RS-232, and GPIO front panel interfaces. The entire chassis will consume less than 400 watts and support a self-contained cooling infrastructure that will conduct heat to the chassis walls.

Mercury planners intend to use the device to power the network-centric warfare environment of the 21st century, providing soldiers with the ability to access and control vast arrays of deployed sensors in real time.

The PowerBlock 200 can also enhance data-intensive applications such as aided target recognition, tracking, geo-location and mapping, terrain rendering, video processing, image enhancement, feature extraction, and communications processing.

“The Cell BE processor was originally designed for the volume home entertainment market, but its architecture of nine heterogeneous on-chip cores is well-suited to the type of distributed, real-time processing that will power tomorrow’s digital battlefield,” says Craig Lund, Mercury’s chief technology officer. “At 200 gigaflops, the Cell BE processor is an order-of-magnitude higher in performance than other processors. In defense computing, the availability of the Cell BE processor is an industry milestone akin to the introduction of AltiVec into the PowerPC architecture.”

FPGAs help handle the heat

At these immense speeds, it is an understatement to point out that density is rising. Malachy Devlin, chief technology officer at Nallatech in Eldersburg, Md., takes it one step further. “We’re reaching the physical limit of the size of the board, causing power and thermal issues,” he says.

Many designers run into trouble when they deploy farms of processor cards with 16 or 32 nodes in the system, but Nallatech designers tend to use a small number of FPGAs. That enables them to stay at a similar wattage while boosting computing performance, Devlin claims.

“If you need a few hundred megaflops, maybe a processor is better, but at 10 gigaflops, FPGA performance per watt is better than a DSP.” That is especially true for C4ISR (command, control, communications, computers, intelligence, surveillance, and reconnaissance), and software-defined radio, running high-fidelity sophisticated algorithms to achieve better detection and higher sampling rates.

“You just can’t do that with a general-purpose processor anymore. So you definitely need an FPGA at your front end, and it is up to your design how much to use that in the rest of the single-board computer,” Devlin says.

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