Board-level memory testing extends to portable applications

WASHINGTON - Boundary-scan testing of memories at the board level is extending to portable applications for field diagnostics with help from new PCI and PCMCIA interfaces for laptop computers. Engineers from ASSET InterTech Inc. of Richardson, Texas, demonstrated this approach last month at the IEEE Computer Society`s International Test Conference in Washington.

Dec 1st, 1997
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By John Rhea

WASHINGTON - Boundary-scan testing of memories at the board level is extending to portable applications for field diagnostics with help from new PCI and PCMCIA interfaces for laptop computers. Engineers from ASSET InterTech Inc. of Richardson, Texas, demonstrated this approach last month at the IEEE Computer Society`s International Test Conference in Washington.

Boundary-scan testing, which evolved over the past five years, is embodied in IEEE 1149.1 principally for DRAMs and SRAMs during the board manufacturing process and for in-system programming. The purpose is to verify the integrity of address, data, and control lines among the memory chips on the board.

The logic portions of the boards normally have their own boundary-scan interfaces for testing, explains ASSET President Glenn Woppman, but the increasing complexity of the memories (80 percent of the typical board by his estimate) poses a testing problem. This is bad enough on the manufacturing floor, but it is even worse for diagnostics in the field, particularly for military systems.

ASSET, which spun off in 1995 from Texas Instruments Inc. in Sherman, Texas, normally concentrates on testing techniques for board-level products in the telecommunications (particularly cellular phones) and high-end computing industries, Woppman says, but is beginning to get into the embedded computer market with sales to such firms as Mercury Computer Systems in Chelmsford, Mass.

Also at the IEEE conference ASSET introduced a new software package called MemoryConnect, designed to automate the interconnect testing of memory arrays that do not have a boundary-scan interface. This was a joint development with LogicVision Inc. of San Jose, Calif., and involves a general-purpose diagnostic tool that ASSET officials claim should drive down manufacturing costs by reducing diagnosis and debug times for failed units. The package sells for $14,995.

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PCI and PCMCIA interfaces such as those pictured above are helping designers bring boundary scan testing to the field through the use of laptop computers.

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