CSPI upgrades multicomputing network

WASHINGTON - Designers at CSPI in Billerica, Mass., are upgrading their new MAP-2600 series multicomputing network this month from a single PowerPC to a quad configuration.

May 1st, 1997

By John Rhea

WASHINGTON - Designers at CSPI in Billerica, Mass., are upgrading their new MAP-2600 series multicomputing network this month from a single PowerPC to a quad configuration.

The MAP-2610 processor board, introduced last January and demonstrated again at the March Navy League conference in Washington, uses the Myrinet system area network/local area network from Myricom in Arcadia, Calif.

This is a VME embedded system, using the 6U board set, aimed at digital signal processing (DSP) applications, and CSPI officials claim it represents the third generation of commercial off-the-shelf multiprocessors beyond the original Intel i860 with DSP and RISC capability in a single chip.

But, as the clock rate of DSP chips increases from 40 MHz (the i860) to 200 MHz (PowerPC) and the memory bandwidth increases from 160 megabytes per second to 400-plus megabytes per second, the imbalance between I/O interconnect and computation is worsening, says Bernard Pelon, CSPI marketing director.

In the Myrinet-based third generation, CSPI engineers are achieving 1.28 gigabytes per second of throughput, says Raphael Semmes, field application engineer in the company`s Laurel, Md., office. When using the 200 MHz Motorola PowerPC 603, the 2610 delivers 400 megaflops in a VME slot. The system is scalable and can accommodate asynchronous transfer mode and fiber distributed data interface links, he says.

Navy experts used earlier CSPI modules for such DSP applications as missile warning for tactical aircraft, and the new series aims at similar high-throughput applications, such as sonar processing, Semmes notes. The software package includes the standard VxWorks real-time kernel from Wind River Systems in Alameda, Calif., and message passing interface library.

More in Computers