3U OpenVPX DSP-based embedded computing board for military applications offered by Sundance

CHESHAM, England, 30 Nov. 2015. Sundance Multiprocessor Technology Ltd. in Chesham, England, is introducing the rugged VF360 conduction-cooled 3U OpenVPX single-board computer for military communications and similar embedded computing applications.

By Mil & Aero staff
By Mil & Aero staff

CHESHAM, England, 30 Nov. 2015. Sundance Multiprocessor Technology Ltd. in Chesham, England, is introducing the rugged VF360 conduction-cooled 3U OpenVPX single-board computer for military communications and similar embedded computing applications.

The board cobines a floating point digital signal processor (DSP) from Texas Instruments with I/O interfaces for processing real-world data. The VF360 is for scalable system designs based on a single-board-computer, where each board is dedicated to a sole function, but can still share data on a common bus/backplane.

The the VITA65 OpenVPX backplane for the VF360 has plenty of bandwidth in the form of PCI Express or Serial Rapid IO (SRIO) of fast switched serial interface for board-to-board communication, high-speed LVDS Parallel I/O, and Ethernet TCP/IP for secure and long-distance interfaces.

The KeyStone-based TMS320C667x DSP from Texas Instruments has options for 1x, 2x, 4x, or 8x DSP cores, running at speeds to 1.25 GHz each, supported by 2 gigabytes of local DDR3 64-bit wide memory and boots from on-board flash. The board operates in temperatures from -40 to 100 degrees Celsius.

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Connectivity among PCI Express interfaces is through a 22x port PCI Express switch, and the built-in Ethernet Ports are routed to the backplane. Software support for the C667x is provided by the Multicore Software Development Kit (MCSDK) which is available free from TI. MSCDK enables each core to run different programs independently.

The board's field-programmable gate array (FPGA) has 36x high-speed serial transceivers that run faster than 12 gigabits per second communication. Its 2x banks of 2 gigabytes of DDR3 memory plus 2x banks of 32 megabytes of QDR-II SRAM for typical storage for pre-/post processing IP-Cores.

The connectivity between the TI DSP and the FPGA is either through the PCI Express switch or directly using four lanes of SRIO, Gen2, running as fast as 5 gigabits per second.

Sundance also can build an air-cooled variation for non-military deployment such as high-voltage power-lines. For more information contact Sundance Multiprocessor Technology online at www.sundance.com.

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