Elma introduces 3U VPX Virtex-6 FPGA processing board with VITA 57 FMC front end

FREMONT, Calif., 26 July 2011. Elma Electronic Inc.’s Systems division has released its TIC-FEP-VPX3b, an FPGA-based, 3U VPX front-end processing board. The new product, providing an FMC site coupled with a large-capacity Virtex-6 FPGA for flexible I/O, is well suited for digital signal processing (DSP), including applications such as radar, sonar, electronic warfare, imaging, and communications. 

Posted by Courtney E. Howard
Posted by Courtney E. Howard

FREMONT, Calif., 26 July 2011. Elma Electronic Inc.’s Systems division has released its TIC-FEP-VPX3b, an FPGA-based, 3U VPX front-end processing board. The new product, providing an FMC site coupled with a large-capacity Virtex-6 FPGA for flexible I/O, is well suited for digital signal processing (DSP), including applications such as radar, sonar, electronic warfare, imaging, and communications.

The new board supports low-power and high-speed GTX transceivers at rates up to 6.5 Gbps, and boast on-board PCIe Gen 1 and Gen 2 protocols via a hard IP block and Ethernet MAC blocks.

The TIC-FEP-VPX3b, built to the VPX specifications, includes four 4-lane fabric ports on the P1, connected by GTX transceivers to the main FPGA. The four channels provide PCIe x4 and Gigabit Ethernet interfaces, as well as two x4 expansion ports.

Featuring an on-board Xilinx Virtex-6 FPGA, the board comes with two banks of 40-bit 1.25 GB DDR3 memory with transfer rates of 7.5 Gbps and a Spartan-6 control node, used to load logic images into the main FPGA. The Spartan-6 control node enables ‘on the fly’ bitstream management for dynamic FPGA configuration. Other resources include zero bus turnaround (ZBT) SRAM with a throughput of 400 MB/sec for expedited read/write processing.

The GTX transceivers can be grouped to form multi-lane Aurora pipes supporting inter-VPX card connection, allowing the FPGA processor boards to be very tightly coupled via point-to-point or mesh topology. The board fits scalable architectures, where more than one FPGA processor is required.

Elma’s supporting 3U VPX-300 Reference Development Platform utilizes a backplane architecture (BKP3-CEN09-15.2.17-n) designed specifically for FPGA interconnects. This front-end/back-end topology is part of the VITA 65 OpenVPX specification. In addition to the topology, the RDP provides the 3U VPX FPGA processor and other products compatible with the TIC-FEP-VPX3b FPGA board such as VPX SBCs, control and data plane switches as well asstorage modules.

The TIC-FEP-VPX3b is compatible with Xilinx development tools including ISE Design Suite and Platform Cable. The new board supports VxWorks and Linux as standard, with the ability to implement the user’s existing source code or third party IP cores.

The board comes in three environmental grades: standard, rugged, and conduction-cooled.

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