WILSONVILLE, Ore., 2 Sept. 2009. Mentor Graphics Corp., maker of high-performance system verification solutions in Wilsonville, Ore., announced that MIPS Technologies, a microprocessor semiconductor IP company, has adopted the Veloce platform for the complete system-level verification of its licensable microprocessor cores that are used in a variety of embedded computing applications.
MIPS cores are used by other Veloce platform users, such as NXP Semiconductors, a supplier of digital SoCs. MIPS Technologies chose the Veloce platform due to its debug capabilities, performance, accuracy, and extensive portfolio of iSolve vertical market solutions, says a company representative.
"As a technology leader in embedded processor IP, MIPS has leveraged Veloce on several of our recent IP development projects—including the multi-threaded, multi-core 1004K Coherent Processing System—to verify new cores before releasing them to customers," says Larry Hudepohl, vice president of engineering for MIPS Technologies. "We use Veloce extensively in an in-circuit emulation mode and for simulation acceleration. The Mentor emulation team helped us tremendously in making an easy transition to the Veloce platform from our previous systems."
The Veloce platform is a dual-mode Accelerator/Emulator, providing MHz performance for both transaction-based verification and traditional in-circuit emulation (ICE). The Veloce platform is employed in multimedia, networking, wireless, and embedded systems applications.
"We have worked closely with MIPS Technologies for many years to provide the best possible emulation solution that meets their needs and addresses the challenges the company faces in verifying processor designs," says Eric Selosse, vice president and general manager, Mentor Emulation Division. "To support the large and growing base of MIPS licensees, we will soon announce new products supporting MIPS processor cores."
"NXP continues to drive system-level integration to provide advanced solutions to our customers," says Iqbal Sharif, general manager, SoC Design Centre of the home business unit, NXP Semiconductors. "Pre- and post-silicon testing of our SoCs requires a massive number of verification cycles to validate functionality and avoid design flaws. The use of Veloce for hardware-assisted verification has played an important role for NXP to achieve the high-speed verification and testing required. This ultimately enables us to beat our tight schedules in a highly-competitive market."
