LEESBURG, Va., 27 Dec. 2007. Curtiss-Wright Controls Embedded Computing in Leesburg, Va., is offering the IPC 2.0 inter-processor communications (IPC) software library for building multi-processor digital signal processing (DSP) VPX and VPX/RED-based platforms with switched interconnects.
IPC 2.0 is for demanding signal processing applications such as radar, sonar, and signals intelligence.
"IPC 2.0 delivers on our investment in abstracting the hardware layers of our VPX DSP boards to ease migration between product generations," says Lynn Patterson, vice president and general manager of modular solutions at Curtiss-Wright Embedded Computing. "Because IPC 2.0 is completely interoperable with earlier versions of IPC, which supported PCI and StarFabric, it greatly eases customer migration from legacy DSP engines from Curtiss-Wright into the switched serial fabric architectures."
IPC 2.0 supports two communications models. Its messaging API provides the foundation for control and synchronization between processors with priority-based, flow-controlled and acknowledged messages. IPC 2.0 also provides a global shared memory model that is used for the transfer of large datasets. With support for global shared memory, IPC 2.0 eases the porting of software between Curtiss-Wright hardware and middleware environments from other DSP engine vendors, making it faster and simpler to migrate from legacy VME64x-based platforms to the high performance VPX/VPX-RED architectures.
IPC 2.0 supports Curtiss-Wright's VPX and VPX-RED cards, including the single and dual-core versions of the CHAMP-AV6 DSP engine and the single and dual-core versions of the VPX6-185 single-board computer. IPC 2.0 is designed to extract maximum performance from the SBC's underlying hardware and automatically makes use of technologies on the boards, such as the CHAMP-AV6's SRIO messaging unit and Freescale 8641 DMA controllers.
For more information contact Curtiss-Wright online at www.cwcontrols.com.