Micro Memory introduces CoSine FPGA PMC compute nodes

CHATSWORTH, Calif., 5 Dec. 2006. Micro Memory in Chatsworth, Calif., is introducing the MM-7105, MM-7110, and MM-7115 CoSine FPGA PMC compute nodes that combine the CoSine preconfigured FPGA infrastructure with Xilinx V-4 devices on the PMC form factor.

CHATSWORTH, Calif., 5 Dec. 2006. Micro Memory in Chatsworth, Calif., is introducing the MM-7105, MM-7110, and MM-7115 CoSine FPGA PMC compute nodes that combine the CoSine preconfigured FPGA infrastructure with Xilinx V-4 devices on the PMC form factor.

The compute nodes offer more than 89K FPGA slices; include more than 600 Xtreme DSP slices; short customer development cycles; and rugged convection-cooled and rugged conduction-cooled models.

Applications include synthetic aperture and phased array radar, software-defined radio, signals intelligence, and semiconductor and medical imaging. The MM-7105, MM-7110, and MM-7115 use V-4 FPGAs for DSP operations such as FFTs, filters, and image or data compression.

"We've had the MM-7105 running successfully at a customer beta site since September," says Jason Beauvais, an application engineer at Micro Memory. "With the PMCs massive FPGA resources, our customer has been able to increase total processing performance for their image compression application while replacing several General Purpose Processing nodes, reducing board slot count, overall cost and power consumption."

The MM-71xx PMCs can be used on PowerPC and x86 Single Board Computers, Altivec DSP boards, A/D converters, graphic engines or any carrier that has a PCI mezzanine card (PMC) site.

The optional CoSine bitsream consists of a PCI/PCI-X bus interface, specialized PCI DMA engine, UPL DMA engine, and multi-ported DDR II memory controller with ECC.

For more information contact Micro Memory online at www.micromemory.com.

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