Curtiss-Wright offers live demonstration of DSP VPX subsystem

LONG BEACH, Calif., 22 Jan. 2007. Curtiss-Wright Controls Embedded Computing in Leesburg, Va., demonstrated an embedded system based on the high-bandwidth VPX (VITA 46) open architecture bus standard last week at the Bus and Board Conference in Long Beach, Calif.

Jan 22nd, 2007

LONG BEACH, Calif., 22 Jan. 2007. Curtiss-Wright Controls Embedded Computing in Leesburg, Va., demonstrated an embedded system based on the high-bandwidth VPX (VITA 46) open architecture bus standard last week at the Bus and Board Conference in Long Beach, Calif.

A high performance successor to the VMEbus architecture, VPX, and its complement, VPX-REDI (VITA 48), were designed to address emerging serial switched fabric, high bandwidth defense and aerospace applications that exceed the capabilities of the earlier bus standard.

Curtiss-Wright demonstrated a system using several of its 6U VPX boards, featuring a VPX6-185 single-board computer (SBC) and two CHAMP-AV6 digital signal processor (DSP) VPX boards operating in a mesh Serial RapidIO (SRIO) network.

Each board in the mesh is connected to each of the others by a bi-directional x4 SRIO connection, with each link providing up to 2.5 gigabytes per second of bi-directional bandwidth.

An application running on the system enabled viewers of the demonstration to choose the number of processors participating in simultaneous streaming transfers between the boards. This application is representative of common signal processing algorithms associated with radar processing which are often limited by data movement in traditional systems.

The demonstration was able to show transfer rates approaching 2.5 gigabytes per second, the theoretical limits of the links.

For more information contact Curtiss-Wright online at www.cwcembedded.com.

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