VMETRO introduces two high-speed analog input XMC modules

HOUSTON, 26 April 2007. VMETRO in Houston is announcing two high-speed analog input XMC modules with Xilinx Virtex-5 field-programmable gate array (FPGA).

HOUSTON, 26 April 2007. VMETRO in Houston is announcing two high-speed analog input XMC modules with Xilinx Virtex-5 field-programmable gate array (FPGA).

The AD3000 is a single-channel 3-gigasample-per-second A-D converter (related story), and the AD1500 is a dual-channel 1.5-gigasample-per-second A-D converter. The modules' analog input uses either a National Semiconductor ADC083000 or ADC081500 8-bit converter.

Both designs share a common FPGA back-end with either a Virtex-5 SX95T or LX110T FPGA and are directly connected to the analog input. This combination of high-speed analog input and high-performance FPGA processing is for demanding real-time applications such as electronic countermeasures, radar, and telecommunications.

An LVPECL trigger input, an LVPECL output, an LVTTL output and the sample clock input are provided on the front panel. This connectivity allows the AD3000 and AD1500 to be operated in a range of modes, including multi-board synchronous sampling.

The FPGA is connected to two 8-megabyte memory banks of QDRII SRAM capable of accepting the incoming data at full speed from the A-D converter, and two 128-megabyte banks of DDR2 SDRAM. Although the use of these memories is defined by the application, they can be used to help maximize the FPGA's DSP processing ability and provide large data buffers.

FPGA reconfiguration is stored in local FLASH memory. The PCI-X interface can be used to send commands to the FPGA to reconfigure itself from a file stored in this FLASH. Alternatively, a JTAG header is provided for code development under the ChipScope Pro development tool chain.

Off board data links are provided through either PCI-X or PCI via the PMC connectors or high-speed, multi-gigabit-per-second Virtex-5 RocketIO transceivers using the XMC connectors. There are 16 full-duplex low-power serial transceivers arranged across two XMC connectors. Each of the sixteen transceivers can operate at up to 3.2 Gbps. A PCI Express end-point controller is available within the FPGA supporting x1, x2, x4 or x8 PCI Express operation. This optional built-in protocol support frees up FPGA resources and simplifies system design.

Host software support includes Windows, VxWorks and Linux, including drivers for high-speed DMA access between the XMC and host CPU, FPGA reconfiguration and diagnostics. Example software and firmware are provided for using the National Semiconductor ADC083000 and ADC081500 with the Virtex-5 FPGA as well as the external memory.

For more information contact VMETRO online at www.vmetro.com.

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