WASHINGTON — Officials at Xilinx in San Jose, Calif., and Sandia National Labs in Albuquerque, N.M., have developed what they claim to be the industry's first stand-alone triple-module-redundancy (TMR) software tool for programmable devices for space.
The TMR Tool, combined with Xilinx's QPRO Virtex-II radiation-tolerant platform FPGAs (field-programmable gate arrays), mitigates the effects of single-event upsets in harsh radiation environments, so designers can deploy reconfigurable technologies in deep space, avionics, satellite, and communications applications, Xilinx officials say.
"Recent space programs such as the Mars Rover, have heightened the public and the space community's awareness of the benefits of being able to reconfigure a system after it has been deployed," says Mustafa Veziroglu, general manager of the Market-Specific Product Division at Xilinx. "With the TMR Tool, Xilinx enables designers to realize the significant advantage of reconfigurable logic in a harsh environment by combining the benefits of reprogrammability, high density, and high reliability into a single solution.
"Sandia National Laboratories has utilized the Xilinx Virtex-II FPGA series to achieve new levels of performance in the complex high-data-rate on-board data- processing systems for a new advanced- technology satellite payload," says Kurt Lanes, senior engineer for the Monitoring Systems and Technology Center at Sandia National Laboratories. "This system demands the highest level of reliability, availability, processing performance, and throughput."
The TMR Tool provides "effective SEU immunity for space radiation environments," Lanes continues. "We envision using Xilinx FPGAs and the TMR Tool for Sandia's future space programs."
"Today's announcement shatters the myth perpetuated by fixed-logic suppliers that SEU immune designs cannot be implemented with reprogrammable FPGAs," says Rick Padovani, general manager of the Aerospace and Defense Division at Xilinx. "Fixed-logic suppliers are driven to perpetuate this myth, given their inability to deliver the multimillion-gate densities, performance, and flexibility achieved with Xilinx FPGAs."
The XTMR tool improves productivity by automatically generating redundant and associated voting circuitry. Designers now only need to generate a design once while the parametrically selectable software tool replicates the design twice, Xilinx officials say. This work was previously done manually so the tool also reduces task time and the potential for error, company officials claim.
Xilinx officials are also involved in the Single Events Consortium (SEE), formed in 2002, by Xilinx in cooperation with NASA Jet Propulsion Laboratory and experts from industry, government, and academia. The SEE consortium focuses on the test and characterization of radiation effects for reconfigurable FPGAs. Through their efforts, the effectiveness of innovative radiation mitigation techniques such as Configuration Scrubbing and Triple Modular Redundancy have been evaluated and documented.
The QPRO Virtex-II family offers high-performance I/O signaling technology supporting as much as 840 megabits per second in plastic and ceramic packages while offering as much as 1,104 user I/O.
For more information go online at www.xilinx.com