SUNNYVALE, Calif., 3 Jan. 2007. Innovative Semiconductors (Innovative), a supplier of IP PHY and controller logic, has introduced a new pricing model that enables chip designers to test Innovative IP in chip designs via an evaluation license before committing to a full license. The first of its kind in the mixed signal design market, the evaluation license provides designers access to all components they would normally get for a full license, with the exception of the layout GDSII file.
Designers can use these components in design activities, including simulation models, timing views, place and route views, and documentation. Purchase is only necessary for pre-tape-out verification, and to obtain the rights for tape-out and manufacture.
"It's always difficult for SoC designers to make a decision on IP purchases sight-unseen, and the consequences of a less-than-optimal decision can be costly and time-consuming," says Christian Heidarson, Gartner sr. research analyst for Semiconductor Intellectual Property and Design Services.
"IP purchase can be very risky, and buyers often don't get what they thought they were buying. With the new Innovative evaluation license, designers get the complete IP package with the exception of the GDSII file, and that eliminates that huge risk," says Nabil Takla, president and CEO of Innovative Semiconductors.
