Analog Devices quadruples SHARC DSP performance

NORWOOD, Mass. - A new SHARC digital signal processor (DSP) is set to hit the market that offers at least four times the processing speed of its predecessor, and may open the way to new DSP-intensive military and aerospace applications such as foliage-penetrating radar.

Jul 1st, 1998

By John McHale

NORWOOD, Mass. - A new SHARC digital signal processor (DSP) is set to hit the market that offers at least four times the processing speed of its predecessor, and may open the way to new DSP-intensive military and aerospace applications such as foliage-penetrating radar.

Experts at Analog Devices in Norwood, Mass., have designed the new ADSP-21160 SHARC DSP core with reduced power consumption and size to compete with the Texas Instruments (TI) new TMS320C67x DSP family.

The 21160 offers performance of 600 million floating point operations per second, while its 21061 SHARC predecessor offers performance of 150 million floating point operations per second.

The ADSP-21160 "has five times the performance of the current SHARC processor, and is code compatible, allowing our customers a seamless migration to the new processor," says Andrew Talbot, business development manager at Spectrum Signal Processing in Burnaby, British Columbia. "Migrating to the 21160 will allow our customers to retain their software investment by reusing existing code and software libraries thereby speeding their time-to-market."

The new device, which is to be the first DSP in a new SHARC family, operates at 100 MHz for 32-bit fixed- and floating-point data types. The new DSP integrates 4 megabytes of on-chip dual-ported and dual-banked static random-access memory.

The ADSP-21160 is designed for high-performance multiprocessing applications such as radar and sonar processing, speaker-independent, large-vocabulary speech recognition, medical imaging, 3D graphics acceleration, and cellular telephone base stations.

The new SHARC DSP executes a 1,024-point bit-reversed, complex fast Fourier transform (FFT) instruction in 90 microseconds, claims Colin Duggan, product marketing manager at Analog Devices. The architecture calculates more than one billion math operations per second on 32-bit fixed-point and 32- and 40-bit floating-point data types.

Meanwhile, TI`s C6701, the first DSP in the C67x family, executes the same FFT in 108 microseconds, says Cheryl Shepherd, C67x marketing manager at TI in Houston. "By the year 2000 the C67x will perform an FFT at less than 40 microseconds, operating at 300 MHz and an overall performance of 3 giga-FLOPs," Shepherd claims.

The ADSP-21160 has a planned maximum performance of 1.2 billion floating point operations per second, Analog Devices officials claim.

The ADSP-21160 comes in a 27mm-by-27mm, 400-ball plastic ball grid array that offers 530 million floating point operations per second for each square inch of chip space. Comparatively, TI`s C6701 is larger at 35mm by 35mm, but offers performance of between 500 and 600 million floating point operations per second for each square inch, Shepherd says.

In addition to smaller size and increased performance than its SHARC predecessors, the 21160`s power dissipation offers 300 million floating point operations per second per watt. This enables designers, for example, to use several processors on a PCI card within the PCI power limit of 25 watts.

With eight 21160 DSPs, providing 600 million floating point operations per second each, a standard PCI card design can obtain 4.8 billion floating point operations per second performance and leave 9 watts for other circuitry, claim Analog Devices officials.

The C6701 operates at 1 GLFOP per 2 watts or 500 million floating point operations per second per watt, Shepherd counters. "We`re still better," she says.

Marketing promises aside, the actual DSP products in full-blown production for floating point operation are TI`s TMS320C40, which operates at 80 million floating point operations per second, and the Analog Devices 21061 SHARC, which operates at 150 million floating point operations per second.

The ADSP-21160 supports multiprocessing via link ports or an external port. Over the external port designers may connect as many as six 21160s without additional support logic. The arbitration for this shared bus is integrated on-chip.

The 21160 also includes 14 channels of zero-overhead direct memory access. The C67, meanwhile, has no link ports and cannot do multiprocessing, Duggan claims.

"We are still evaluating whether future versions of the C67 will have link ports," TI`s Shepherd says.

The new family is code compatible with the ADSP-2106x SHARC DSPs and works with VisualDSP, Analog Devices` open architecture development tool for the SHARC, that enables DSP designers to work with third-party tools, ADI tools, and the designer`s own custom tools through its common application programming interfaces. In addition, Analog Devices and Ixthos Inc. of Leesburg, Va., are jointly developing a software library of ready-to-use algorithms.

Samples of the ADSP-21160 will be available through Analog Devices this fall at a sample price of $300. TI officials plan to sample the C6701 at $196 in October.

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