By John Rhea
WASHINGTON - Semiconductor industry designers are looking to copper on-chip interconnections to prevent the jamming together of ever-smaller active elements and the resulting degradation of the electrical signals between the transistors in digital signal processing (DSP) and microprocessor chips
Aluminum has long been the interconnect of choice because, unlike copper, it does not contaminate the silicon surface layer of the chips. However, aluminum has a higher electrical resistance than copper and is a potential bottleneck as feature sizes approach 0.1 micron.
At this year`s International Electron Devices Meeting, members of three companies reported they had used copper successfully, and Robert Havemann, manager of advanced interconnect development at the Kilby Center of Texas Instruments in Dallas, said this one change alone could up the performance of DSPs and microprocessors by a factor of 10.
The TI approach is to combine copper wiring with an insulating material called xerogel, which comes from microscopic glass bubbles containing air. "Xerogel may be the ultimate solution because it has the lowest dielectric constant known other than air," Havemann told those who attended the conference.
Company engineers have produced prototype chips at the Kilby Center (named after Jack Kilby, who invented the integrated circuit at TI), and Havemann projects that designers can economically incorporate the technology into processor chips with feature sizes as small as 0.1 micron and more than 500 million transistors per chip.
Chip designers initially will apply the technology to new generations of portable electronics for the consumer market such as cellular telephones, notebook computers, personal communicators, and video watches.
Yet the performance improvements should also be valuable for computationally intensive military and aerospace applications where size and electrical power are limited, and where a few powerful chips could help reduce packaging requirements or perform military functions that are not feasible with today`s technology.
Instead of combining an insulating material with copper, officials of the IBM Semiconductor Research and Development Center in Hopewell Junction, N.Y., and the Motorola Advanced Products Research and Development Laboratory of Austin, Texas, built up six vertical layers on the chip to prevent what is known as "electromigration," in which the copper actually moves along with the electrical current and contaminates the silicon.
IBM and Motorola officials said they had fabricated 1.8 volt prototype chips in complementary metal oxide silicon - a 0.25 micron process 288K static random access memory at IBM, and a 0.2 micron SRAM at Motorola.
