Whither mixed-signal processing?

Perhaps the most pressing problem of mixing analog and digital devices in the same system is the inevitable necessity for the components to talk to each other. That normally requires not only a serial or parallel data bus, but interface standards as well, which ensure that component suppliers are all on the same page.

Dec 1st, 1997
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Mixing and matching analog and digital functions at the system/module level

By John Rhea

Perhaps the most pressing problem of mixing analog and digital devices in the same system is the inevitable necessity for the components to talk to each other. That normally requires not only a serial or parallel data bus, but interface standards as well, which ensure that component suppliers are all on the same page.

The utopian solution would be an all-purpose data-routing network applicable to any system the military services could ever imagine - one that would interface with any microprocessor or digital signal processor (DSP), as well as with any RF source, sensor, or actuator. That would amount to the ultimate in open-systems architectures and would greatly drive down system costs through commonality and the resulting economies of scale.

That`s not likely to happen. Too many participants in the acquisition process (industry and government alike) have too many vested interests in their proprietary networks and devices. Even if all the players could reach consensus on a ubiquitous network for future systems, what would they do about the hodgepodge of existing weapons platforms? There has to be a better way.

Kang Lee, head of the sensor integration group at the National Institute of Standards and Technology (NIST) of Gaithersburg, Md., says he believes he has found one. It is the new interface standard IEEE-1451.2, hammered together over the past four years at NIST, at the TC-9 committee of the Institute of Electrical and Electronics Engineers (IEEE), and at about 25 companies. Electronics industry leaders formally adopted the standard in September.

NIST officials estimate there at least 50 different types of proprietary networks in existence, which frustrates the 3,000 sensor and actuator manufacturers trying to tailor their products for the broadest range of applications. The result is a fragmented market in which the manufacturers are confined to small subsets of the potentially huge network business.

Common bridge

As a network-independent digital interface, IEEE-1451.2 is intended to provide a common bridge for reading sensors, setting actuators, and accessing key identifying and historical information on the devices, and amounts to plug and play interoperability over a local area network (LAN) or the Internet, NIST officials say.

Any new standard disrupts the existing order, however, and the proponents are concerned about how quickly industry leaders will pick up on the idea. Lee says he believes he may have a customer already; officials of the U.S. Naval Sea Systems Command in Arlington, Va., have been asking for more information as a possible aid to their task of performing maintenance on board ships, he reports.

The Navy has a stated goal of reducing manning on its ships, and one approach is to replace people with sensors. This would amount to about 200,000 sensors per ship, Lee estimates, but the existing proprietary networks are what he calls "a nightmare of coax and fiber optic cable." Rather than rip them all out and start over from scratch, Navy leaders are looking into interfacing the sensors to be installed with the existing networks via IEEE-1451.2.

There are other problems with the existing order. The diversity of network protocols has impeded the spread of intelligence to the sensor and actuator nodes of control systems, explains Stan Woods, project manager at Hewlett-Packard Laboratories in Palo Alto, Calif., and leader of the TC-9 working group. "Use of smart transducers in manufacturing systems has not been proportional to the growing opportunities for improving measurement and control," he says. Transducers is the generic term for sensors and actuators.

Chief elements of IEEE 1451.2 are a network-capable application processor, 10-wire transducer-independent interface, a set of communication protocols, and a transducer electronic data sheet (TEDS) - the core of the standard that provides a common format for capturing and conveying key information on each device in a network. Data sheets contain such information as manufacturer name, data code, serial number, limits of use, uncertainty, warm-up time, sampling rate, and date of last calibration.

"The TEDS enables device-level intelligence and self-identification of devices," Lee says. "This simplifies installation, integration, and maintenance."

There are several options for implementing the standard. One way is for sensor and actuator designers to make stand-alone "smart transducer interface modules" for sale to users, system integrators, and manufacturers of computers, programmable logic controllers, and test and measurement equipment. Another is for transducer designers to buy network-capable application processors from control network vendors and to integrate these standard-compliant microprocessors into their smart devices.

Coping with microprocessors

Mixing and matching analog and digital devices has loomed as a problem for the Pentagon since 1971, when the development of the first crude 4-bit microcontroller by Intel Corp. of Santa Clara, Calif., launched the current era of microprocessor-based systems. The front-end analog sensors - notably radar and infrared - could not keep up with the exponentially increasing speeds of the back-end digital processors. It became imperative to digitize the analog representations of the "real world" as far up front in the system as possible to feed the voracious processors.

That is essentially what the sensors of the human body do, and that is why the optic nerve has the shortest possible signal path to interface with the brain. The world is, after all, analog, and the optic nerve is a high-throughput analog-to-digital (A-D) converter that provides, from the visible portion of the electromagnetic spectrum, most of the data required by the three-pound central processor. In this context, the human brain can be considered the ultimate mixed-signal processor.

In the case of military systems, the hardware for the A-D job has evolved from the Microwave and Millimeter Wave Integrated Circuit (MIMIC) program of the Defense Advanced Research Agency (DARPA) in the 1980s and extended with a follow-on DARPA program initiated in late 1995 called the Microwave and Analog Front End Technology effort.

This progression logically evolves to another DARPA effort called the application-specific electronic module (ASEM), in which individual chips interconnect on a silicon substrate and then mount on a board. This represents an intermediate level of integration between chips (which will continue to become more functionally dense, and the boards.

The ultimate ASEM for an avionics application, for example, might include multichip modules (MCMs), digital and microwave integrated circuits, transformers, flowing cooling fluids, optical and copper cables and connectors, and embedded software. While that level of sophistication is beyond today`s technology, it should be possible to combine within a single ASEM for a Global Positioning System (GPS) receiver a gallium arsenide (GaAs) analog front end, a complementary metal oxide semiconductor (CMOS) signal processor, and a crystal oscillator.

Dual-use for ASEMs

John Hartman, corporate defense business development manager at Analog Devices Inc. of Wilmington, Mass., says he envisions just such a system in a 1.5-inch flatpack for a GPS "personal navigator." It would consist of three chips: an RF front end, a DSP, and an inertial measuring system to supplement GPS when the satellites are out of the line of sight. The chipset could be produced in volume for OEMs at around $200 for commercial applications, Hartman estimates, and $1,000 for a military-grade chipset.

As a major producer of DSPs with their SHARC line, Analog Devices officials would be major beneficiaries if this country were to proceed with plans for an intelligent transportation system in which personal navigators would be essential components in a variety of highway vehicles. This would likely start with trucks and other commercial vehicles and have a voice capability for alerting motorists of traffic conditions.

This application also has potential as a dual-use technology and should achieve sufficient volume to create new families of standard parts. Although the fierce competition in commercial markets (cellular telephones, for example) dictates relatively short lifecycles of about five years, the suppliers could expect lifecycles of 10 to 15 years for the military equivalents.

Consumer products such as cellular phones and camcorders, with their requirements for high performance and their potentially high volumes, are amenable to "system on a chip" concepts in which both the A-D and DSP functions can combine on a single piece of silicon, explains Ross Ayotte, the Analog Devices director of marketing communications. He cites the company`s MicroConverter 12-bit, eight-channel device with self correction implemented in 6-micron CMOS. This is a standard product, Ayotte insists, available for a variety of applications.

System on a chip?

Why not combine the analog and digital functions on a single device, the so-called system on a chip? Industry observers say that is OK for high-volume commercial applications in which the non-recurring engineering costs can amortize over a long production run and where there is ample opportunity to proceed down the experience curve. But for lower-volume military applications, with their higher performance requirements, this approach would require custom chips at inherently higher costs throughout the lifecycle. Also, the greater chip complexities would initially hold down yields, and there would not be sufficient volume ever to get the yields up to economical levels.

Hence the popularity of MCMs. When officials of Coreco Inc. of St. Laurent, Quebec, launched their new quad DSP board in September called the Python/C6 with four Texas Instruments C6020I DSPs on a single-slot PCI card, they figured the new product could handle analog functions through daughtercards mounted on the PCI card.

There are two options, explains Marino Jelavic, DSP program manager at Coreco: two IndustryPacks and/or one PCI Mezzanine Card, each about one-eighth the size of the Python board. They can perform as many as 100 functions, Jelavic adds, including the usual A-D and D-A conversions. Moreover, the whole module is strictly standard off-the-shelf, and yet it can cover a broad range of military and aerospace applications, such as radar, sonar, speech recognition, and signature intelligence.

Designers at Pico Systems Inc. in Toledo, Ohio, also use the MCM approach to mix and match analog and digital on silicon substrates ranging in size from 30 millimeters square up to wafer scale integration proportions of 100 millimeters on a side, and capable of accommodating half a dozen to several dozen chips (bare die) per substrate.

The idea is to create a generic, passive array of wires on the substrate connected by the anti-fuse technique, says Pico President Jeffery Banker. Each junction on the substrate is a pillar of amorphous silicon and the routing networks are customized with a series of 1 ohm connections.

Pico engineers demonstrated one of these customized standard modules last month at the NASA Goddard Space Flight Center in Greenbelt, Md. This module, which is scheduled for flight in early 1999 as part of a technology demonstration, is an all-digital laser-programmable gate array, but Banker says engineers have used the same approach in MCMs with about one-third digital and two-thirds analog functions such as a voice encoder circuit produced for the Motorola Government Systems Group, Phoenix, and a module in Army artillery shells that can transmit back positions and survive loads up to 20,000 Gs. Pico designers have also built dual-channel voice amplifiers for NASA.

Halfway between custom and standard

Banker calls Pico`s approach a half-way house between standard and custom designs and thus particularly suited for space applications. For relatively small quantities of 50 or 100, the cost savings can run an order of magnitude over custom circuits, he says. Also, if there are a lot of iterations in the design, the savings in time can be substantial: ready in two weeks instead of several months. Another advantage of MCMs, which is particularly important for spacecraft, is the reduced form factor over individual devices, which Banker estimates is a factor of 6 to 10.

Another example is an MCM built around MIMICs that designers at M/A COM of Lowell, Mass., are producing as an upconverter/modulator for a U.S. Air Force electronic warfare application. The module contains a GaAs MIMIC front end with passive components, application-specific integrated circuits, and digital logic in the package, explains Renee Burba, program manager for multifunction assemblies at M/A COM. She says she figures this vertical integration approach can save 30 percent over conventional packaging over a 6-year production run. The module approach also reduces testing and screening time, she adds.

Similar modules are involved in the AN/ALQ-211 Suite of Integrated RF Countermeasures (SIRFC) system that ITT Avionics, Clifton, N.J., is producing for the U.S. Army Special Operations CV-22 Osprey aircraft. The principal function of this system is to serve as a sensor fusion processor to integrate multispectral sensor-derived data and provide the pilot with a real-time comprehensive picture of the electronic battlefield.

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A multichip module that contains a GaAs MIMIC front end with passive components, ASICs, and digital logic in the package are involved in the AN/ALQ-211 integrated RF countermeasures system that ITT Avionics is producing for the U.S. Army Special Operations CV-22 Osprey aircraft. This system integrates multispectral sensor data into a real-time picture of the electronic battlefield.

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The AN/AAR-44 electronic countermeasures suite from Northrop Grumman Electronics Systems is part of large combat aircraft such as the Lockheed Martin C-130, pictured above. The AAR-44 system makes extensive use of mixed-signal processing.

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Designers most often tackle mixed-signal processing issues at the board level, yet are looking into applications that call for device-level mixed-signal processing. UTMC photo.

Test requirements loom for mixed signals

"Mixed signal is coming!" proclaims Mike Kondrat, vice president for marketing at Opmaxx Inc. of Beaverton, Ore., who insists that leaders of the semiconductor industry need to plan now to have the necessary testing capability ready when analog and digital functions are truly integrated at the chip level.

Speaking at the IEEE Computer Society International Test Conference last month, Kondrat maintained that analog functions had been virtually ignored in the 1994 roadmap of the Semiconductor Industries Association (SIA) and that the trend toward deep submicron feature sizes was driving a parallel trend toward systems on a chip.

The priorities are fault modeling and system level design, he told conference attendees, yet the roadmap ignores the necessary analog and mixed-signal testers. Opmaxx officials who produce analog design and test automation tools used the conference to announce an agreement with LTX Corp. of Westwood, Mass., to combine forces to test the future systems. Westwood makes analog and mixed-signal test systems.

The SIA roadmap shows feature sizes declining steadily from 0.35 micron in 1995 to 0.25 micron next year and then eventually down to 0.07 micron by 2010. But only about half of the testers will have analog capabilities next year and the industry will not reach 100 percent until 2001, Kondrat says. He considers the lack of test capability a potential bottleneck for multi-chip designs.

Bozena Kaminska, vice resident and chief technical officer at Opmaxx, stresses that designers need to pay more attention to the system-level environment for these new systems on a chip. Interconnection is consuming 60 to 75 percent of resources, she claims, and there is a need for a common environment involving vertical and horizontal integration. This means integrating the process, design, and test capabilities as inseparable issues. Failure to do so will adversely affect yields, which are particularly critical for new applications.

"Interconnection management is the biggest issue for design and test," Kaminska told the briefing. "If it doesn`t fit, it will not work. It`s as simple as that." She also urges greater attention to the concept of design-for-testability.

The deep submicron trend requires a mixed-mode solution, Kaminska says, and that means such new analog effects as signal integrity, signal timing, and temperature. At the rapidly increasing speeds of digital functions, it is hard to distinguish between a string of digital bits and the traditional analog waveforms. "When is it analog?" she asks, "and when is it not just a zero or a one?"

In the long run, Kaminska says applications will drive the system requirements. She cites video (which she says worked as components and failed as systems), communications (particularly data recovery and the simulation of waveforms), disk controllers, and phased lock loops (PLLs) as examples. -J.R.

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