COTS board vendors make their DSP choices
Texas Instruments and Analog Devices continue their battle for the high-end military and aerospace systems designer, and the fight may take on new dimensions with the introduction of TI`s new fixed-point DSP as competition for the SHARC
COTS board vendors make their DSP choices
Texas Instruments and Analog Devices continue their battle for the high-end military and aerospace systems designer, and the fight may take on new dimensions with the introduction of TI`s new fixed-point DSP as competition for the SHARC
By John Haystead
Like all DSP applications, optimum electronic solutions for military and aerospace applications are based on the size of the computational problem (i.e., the number of chips required), system production volumes, upgrade requirements, algorithm development, and operating environment. These parameters determine whether designers will build their own boards or choose a commercial off-the-shelf (COTS) board or similar solution.
Yet military and aerospace electronics designers consider certain key parameters that make some commercial DSPs more popular than others, and specifically have made the Texas Instruments TMS320C40/ 44 and the Analog Devices 21060/62 SHARC DSPs the overwhelming devices of choice for new military and aerospace electronics board and system designs.
On a revenue basis, TI is still the clear market leader in floating point DSPs. Sixty-six percent of all military and aerospace electronics designers were using TI floating point chips, 15 percent Analog Devices, 9 percent Intel, 7.5 percent Lucent Technologies (C32/3210), and the remaining 3 percent Motorola, according to a survey by market researcher Forward Concepts Inc. of Tempe, Ariz., conducted in last year`s fourth quarter. It is also clear, however, that the SHARC is getting more new, floating-point-intensive design wins than the C-40, and is doing particularly well displacing the older Intel I860.
Intel marketing executives continue to vacillate in the military DSP market. Although they say they are committed to long-term support for the I860, their support for this relatively old architecture is primarily because of pressure from officials in the U.S. Department of Defense. Intel officials say they plan no next-generation DSP devices. Intel leaders have also backed away from their I960 microprocessor, which had had some early success in the military and aerospace electronics market, particularly in initial avionics designs of the Lockheed Martin F-22 advanced tactical fighter, and the Boeing-Sikorsky RAH-66 Comanche scout/attack helicopter.
Unique military needs
DSP performance and appeal is a continually moving target, and military and aerospace electronics board vendors are constantly on the lookout for new devices and features. While it may seem that the options are endless, in fact, they are looking for very specific characteristics to meet the unique needs of their military and aerospace electronics customers.
While general-purpose COTS DSPs are extremely powerful and versatile devices, the relatively small defense market is not the primary driver behind their core designs. Rather, large commercial applications such as telecommunications and multimedia tend to determine most DSP design parameters and features.
For example, the design of the I/O and register structures of the new TMS320C6x DSPs from the Texas Instruments Inc. Semiconductor Division in Houston (see sidebar) are highly-tuned for the commercial modem market, and may not be optimum for radar and signal-intelligence applications. Likewise, most devices in the SHARC DSP family from Analog Devices in Norwood, Mass., are primarily designed for the cellular base station and handheld communications markets. As a result, to fully meet the specialized needs of military systems, board and system designers must incorporate additional value-added capabilities through efficient interconnect architectures, operating systems, and software tools.
The SHARC, however, may have more kinship with military and aerospace electronics designs and requirements than most COTS DSPs.
Len May, product marketing manager of the Analog Devices Systems IC products division, says he agrees that military and aerospace electronics buyers today do not drive DSP technology as much as they did in the past. Nevertheless, he says he can still serve different market needs and design requirements by offering a family of DSPs.
The initial SHARC 21060 development came to a large extent from military funding, with specific military and aerospace electronics requirements such as six high-speed link ports and 4 megabits of on-chip static random access memory(SRAM) included. "Although we have subsequently introduced other parts aimed more at the telecommunications and non-multiprocessor markets - such as the 21062 which has half the on-chip SRAM and the new 21061 which has only one megabit of SRAM and no link ports - the 21060 still specifically addresses the military and aerospace electronics market," May says.
Board and subsystem designers, how-ever, can enhance the performance of a COTS DSP - even when they start with high-performance devices. "Board and system vendors bring unique expertise to maximizing and tailoring the capabilities of commercial DSP chips for military and aerospace electronics requirements," explains Barry Isenstein, vice president of strategic marketing at Mercury Computer Systems of Chelmsford, Mass. After all, Isenstein points out, military and aerospace systems designers are concerned with large computational loads, limited production volumes, and long-term upgrade paths. As a result, he says, "military and aerospace electronics designers value rapid technology insertion more than any particular processor family, chip architecture, or manufacturer."
A purely generic DSP sometimes cannot meet the needs of military and aerospace systems designers, says Joseph Sgro, chief executive officer and director of research at Alacron Inc. in Nashua, N.H. "As opposed to telecommunications applications which in general have small data streams and are built for very low-density SRAM with limited internal RAM space, large-scale military and aerospace electronics applications need lots of throughput, memory, and fast I/O rates. We try to overcome these limitations by implementing a lot of high-speed local memory," says Sgro, whose company offers SHARC-based 6U VME boards with as many as eight DSPs on the base board.
Andy Stevens, General Manager of Transtech Parallel Systems in Ithaca, N.Y., points out that military and aerospace electronics customers typically have a large imaging component to their applications. "If the problem can`t be solved with a single processor, that`s where we come in with multiple-processor solutions. Although we`re looking for high performance, we also need a straightforward interconnection architecture that allows efficient processor-to-processor and processor-to-host communication."
Specifications and real-world performance often are quite different, cautions Steve Curtin, marketing manager at VME DSP board designer Ariel Corp. in Cranbury, N.J. "There`s a difference between megaflops and useable megaflops," Curtin says. "The bottom line is overall performance, and just putting a lot of DSPs on a board doesn`t accomplish much if they don`t communicate well. The board architecture has to take into consideration how data is moved on and off the board, interprocessor communication, and memory-access time."
Fixed point vs. floating point
Given the large computational loads of most military and aerospace electronics applications, designers implement general-purpose floating-point DSPs far more widely than fixed-point devices. "In addition to ruggedization and cost issues, defense OEMs are looking for raw power and as many megaflops as possible, which translates into high-performance floating point DSPs," explains Ariel`s Curtin.
Military and aerospace electronics designers also need DSPs that are highly-scaleable to enable them to implement not only large numbers of interconnected processors on boards, but also large numbers of boards in systems. These parameters alone quickly narrow the field of competitive DSP products.
Although the total $144 million floating-point DSP market today represents only 6 percent of the $2.3 billion worldwide DSP market, the floating point market is growing faster than fixed point - 54 percent annually - and should reach $1.4 billion by 2001, according to Forward Concepts figures. Driving the floating-point DSP market are decreasing prices and improving software tools. The fixed-point market, meanwhile, will grow 37 percent annually and should reach $10.7 billion by 2001, say Forward Concepts experts.
Although special-purpose DSPs and custom application-specific integrated circuits (ASICs) are still in demand for close-to-sensor "upstream" processing because of their data-independent vector processing, fast Fourier transform (FFT), and convolutional performance, high-performance general-purpose DSPs are proving themselves capable of handling an increasing amount of the overall signal-processing load.
"Today`s fixed-point, general-purpose processors are generally too slow for upstream applications, but the technology is quickly reaching the point where they will be able to replace custom ASICs," says Alacron`s Sgro, who points out that floating point processors become more efficient as data streams get further away from the sensor. "Ultimately, we`ll see a migration to heterogeneous systems with both fixed-point and floating-point general-purpose DSPs," Sgro says.
RISC processors that have not succeeded commercially had better success among military and aerospace electronics designers because of the need for determinism and real-time operation, says Ariel`s Curtin. "Whereas a DSP pipeline is flushed every instruction, with its state known at every clock cycle, this is harder to do with RISC pipelines. DSPs also handle interrupts more efficiently."
DSPs are also generally easier to program in assembly language than RISC devices, which can boost performance in most systems. Although most designers use C code for overall functionality, they usually program their time-critical functions in assembler.
On/off chip I/O is another important factor for military and aerospace electronics systems, which makes DSPs specifically designed with communication, link, and serial ports for direct processor and interprocessor communications most appealing. Designing these interfaces with RISC devices is much more difficult, and their performance will not be as high, experts say.
"Depending on your compute model, you can either separate your processing functions between arithmetic units and a control processor, or you can combine both functions in one package, both of which have pros and cons," says Alacron`s Sgro.
Most military applications tend to have extremely high floating point and I/O requirements leading to large parallel arrangements of high-throughput floating-point chips instead of symmetric RISC multiprocessors.
PowerPC captures RISC niche
Still, RISC-based processors such as the Intel I860 continue to be popular in military and aerospace electronics applications as complementary processors in hybrid systems. "Although we have designed with the I860 in the past, which had both RISC and DSP capability, this was a unique case and doesn`t appear that it will happen again," says Bernard Pelon, director of marketing for CSPI in Billerica, Mass.
Pelon says DSPs are already differentiating themselves significantly from RISC processors - a trend, he predicts, that will continue in the future. New high-speed specialized DSPs such as the SHARC provide distinctly different performance attributes from high-performance general-purpose RISC processors such as the IBM/Motorola PowerPC.
Nevertheless, Pelon observes that military and aerospace electronics designers want both kinds of capabilities. "The challenge is to integrate the capabilities of both processor types into one system without burdening the customer with the details of the devices." CSPI`s solution is to provide a bridge from the I860 to the PowerPC together with integrated high-speed connectivity to next-generation DSPs, Pelon says.
CSPI`s MAP-2610 board combines Myrinet high-speed network technology with the 200 MHz PowerPC 603. The 6U 400-megaflop VME board is designed around the PCI bus and includes a PCI-VME bridge. The PCI bridge links the PowerPC bus to the 33 MHz 64-bit PCI local bus and to an optional companion VME MAP-SW-10 board which contains a PCI carrier and two PCI mezzanine card (PMC) slots in addition to the Myrinet network chipset. The carrier board can hold CSPI`s 4- and 8-SHARC PMC processor units, or other I/O options such as FPDP 32 parallel, VSB, ATM, and FDDI. "The SHARC units were first, but we will continue to enhance the fabric with other high-performance DSPs from both TI and Analog Devices," Pelon says.
"RISC processors, like the PowerPC, work well for downstream processing after data reduction," says Mercury`s Isenstein. "This is where they really shine on less predictable, random access, more heuristic, conditional algorithms." Mercury`s MCH-series VME64 motherboards combine the 200-MHz PowerPC 603e with several SHARC DSP processor options and the RACEway (ANSI/VITA5-1994) switched-fabric interconnect standard. All processors and I/O devices are on daughtercards which can combine in various configurations to deliver as much power as 1.1 gigaflops on a 6U board and 4.4 gigaflops on a 9U VME board.
Each PowerPC daughtercard has two PowerPC compute nodes, each with either 8 or 16 megabytes dynamic random access memory (DRAM), while SHARC daughtercards are configured with two three-processor-SHARC nodes, each with either 8 or 16 megabytes of DRAM shared between the node`s processors. PowerPC and SHARC daughtercards can be configured on the same motherboard. Mercury designers chose the PowerPC because of "Motorola`s roadmap for predictable performance increases over the next five years," Isenstein says. Mercury engineers have already built systems with as many as 140 processors delivering more than 38 gigaflops.
"Many military customers are pushing hard for both RISC and DSP in the same system," agrees Transtech`s Stevens. As the I860 has gotten "long-in-the-tooth," Transtech designers have also turned to the PowerPC for their high-performance RISC requirements and as a migration path for their "transputer" users.
Transtech leaders recently introduced the TSP-4 6U-VME PowerPC system which has two or four 200 MHz PowerPC-603EVs and a PCI bus embedded directly on the board. Sustained transfer rates of 130 megabytes per second are possible between the PowerPC nodes, Stevens says, and "the company is also looking at ways to have the devices talk to SHARC as well." A PMC slot provides inter-board communications or application-specific I/O from third-party PMC module vendors.
Around the boards
While "nice-to-have" architecture/feature/ cost parameters are fine, the true test of a DSP`s popularity is its implementation. All things considered, "we`re looking for the highest-performance devices on the market, both RISC and DSP," says Ariel`s Curtin. For DSPs, Ariel uses both the TI C40/44 and the SHARC. "The C4x has always offered a path to faster devices as well as a good method for multiprocessing," Curtin says. "In addition, it`s a well-established product with a good base of development tools and software."
On the other hand, Curtin says he sees the SHARC making substantial inroads, particularly in FFT and spectral-analysis applications, which encompass a large part of military and aerospace electronics demand. He also says he likes the reprogrammability features of the SHARC. "Designers can assign devices as needed to either FFTs or other functions such as averaging, windowing, etc.," Curtin says. "This makes board design a lot easier."
Ariel`s latest SHARC offering is the 6-processor Hammerhead V200 6U VME board with a peak performance of 720 megaflops and as many as three megabytes of zero-wait-state SRAM and flash memory. In addition to 12 front-panel 40-megabyte-per-second link I/O ports, the board has two OpenIO baseboard access sites suitable for COTS radar and sonar I/O modules. Ariel engineers are also working on a variety of other OpenIO data acquisition modules, such as a 12-bit, 50-MHz A-D converter, 14-bit 2-MHz A-D converter, and 16-bit sigma-delta converter for A-D and D-A conversion.
Graeme Harfman, product manager at Spectrum Signal Processing of Burnaby, British Columbia, says he also likes the C40 and SHARC, but points out that "the development environment for the C40 is more mature than the SHARC`s, and it remains particularly attractive for users whose megaflop requirements are not as high."
Together with Hewlett-Packard of Lake Stevens, Wash., Spectrum engineers have developed an octal-C40 VXI board with two embedded 60-MHz C40s and support for an additional six single-wide or four double-wide TIM-40 modules. The VX8 has from 4 to 64 megabytes of DRAM shared between the VXIbus and TIM-40 sites and eight buffered front-panel communication ports. The worldwide VXI market is expected to reach $860 million by 1999, and Harfman sees the military, particularly the Navy, showing interest in VXIbus because of its electromagnetic shielding characteristics.
Similar to other board vendors, Harfman says he views the SHARC as a natural migration path for I860 users, "particularly following Intel`s announcement that it would not be moving forward with array processing." Spectrum now has SHARC products in VME and PCI format including a product developed with Northrop Grumman Corp. of Los Angeles that implements eight 40 MHz SHARCs on a 6U VME64 board with an onboard PCI bridge and IEEE P1386 PMC site for I/O. The V8 product has 960 megaflops performance and VMEbus data transfer rates close to 80 megabytes per second. Different PMC modules support VSB, RACEway, and the VITA front-panel dataport (FPDP) standard.
Although existing C4x users often still prefer TI`s devices to the SHARC, I860 designers have, on the other hand, been flocking to the SHARC. "Although the I860 and I960 are still not bad price/performance devices and existing developers are not completely abandoning the chips, they`re not putting them into their new designs either. New designs are moving to SHARC," says Alacron`s Sgro.
Alacron engineers use the SHARC because "it`s currently the fastest device in terms of I/O and megaflops-per-dollar on the market," Sgro says. "Our emphasis is on balancing I/O with floating point performance and, compared to the ADI 21060, the C40 has fewer megaflops and significantly fewer cycles per memory transfer."
Alacron`s, Dominator board includes as many as eight SHARC processors with a scaleable peak performance to 960 megaflops on a 6U VME64 board. Two "FastTrack" expansion connectors allow for additional eight-SHARC daughter cards or other I/O options, and a dedicated Pentium P5 processor offloads operating system functions from the SHARC array. The SHARCs interconnect via dual-ported local memory and can also interface to Myrinet via the card`s PMC interface.
While VME remains the clear bus of choice for military and aerospace electronics applications, there is growing interest in PCI, particularly in terms of bridges and interfaces. Most board makers are also continuing an open-door policy toward the possibilities of Compact PCI, but most are also waiting to be convinced of its widespread potential.
"Until recently, we`ve serviced the military and aerospace electronics market primarily with PC-based development platforms, but this is starting to change," says Bob Senko, director of sales for Bittware Research Systems of Concord, N.H. Senko says PCI has helped combat PC-bus throughput issues and enabled his company to compete with VME from a performance viewpoint. "Now, with Compact PCI, we can also address the ruggedization and mechanical issues."
Bittware`s full-length Megamouth PCI-board houses four ADSP-2106x SHARCs configured in a single cluster with as many as two 16-megabyte banks of DRAM. The board has eight SHARCNET link connectors and two external serial ports. Each of the board`s processors has two external link port connectors and two have a single external serial port connector.
Bittware will introduce a compact PCI product in the second or third quarter of this year which will be a 3U, dual-processor SHARC product with a mezzanine site for various optional I/O modules, Senko says.
Transtech officials are also starting to see some interest in PCI from military and aerospace electronics customers, Stevens says. Transtech officials recently introduced their ASP-14 series of PCI-based short-cards with 1 to 4 4-MIPS/120 megaflops SHARCs and a mezzanine connector that can hold an additional eight SHARCs.
SHARCPAC mezzanine modules are available with as many as eight processors, and are supported by PCI, ISA, and VME module carriers. Stevens acknowledges, however, that since "clearly PCI can`t match VME in terms of power and ground, heat dissipation, etc., if you have a huge number of processors, VME is still the way to go." Transtech officials also are monitoring Compact PCI closely, however.
Right now there are very few alternatives to VME in the rugged area, and even if Compact PCI becomes a reality, "it doesn`t offer many performance improvements, if any over VME," says Mercury`s Isenstein. "Bus speed parameters are not that important, considering we can provide systems with over a gigabyte per second of aggregate system bandwidth in a 16-slot chassis."
Although Alacron officials are looking at moving some of their PCI-based products to Compact PCI, there isn`t the critical mass in the market to drive a major conversion effort, Sgro says. "The big question is whether PCI will be a cheaper alternative than VME," he says. "If you can get most of the benefits of VME with the economies of PCI, it will succeed. If not, I can`t see why people would move to the form factor." Spectrum`s Harfman says he agrees. "We`re looking at Compact PCI products future, but we`re waiting until we see more I/O develop in the market."
While the military and aerospace electronics system demands may not be the primary driver behind the development of high-performance, general-purpose DSPs, clearly they are the beneficiary. Vendors of COTS boards will soon be offering exponential improvements in processing power, flexibility, and system densities based on the next-generation devices now hitting the market.
It will also be interesting to see, however, how well they do to enhance and differentiate their products with new combinations of interconnection, bus, memory, and I/O architectures to make the most of the capabilities of their new devices. Military and aerospace electronics designers can expect to have their hands full keeping up with the number of new options soon to be put before them.
The Transtech ASP-P14 PCI short card has one to four SHARCs and 12 megabytes of shared memory. Each SHARC can communicate with other SHARCs on neighboring PCI, ISA, or 6U VME boards via 12 link ports mapped to the edge of the card and interconnected via cables.
The Spectrum V8 VME/PCI board has eight 40 MHz, 120 megaflops ADSP2106x SHARCs arranged in four clusters of two processors. Each cluster has 128K-by-32 (1/2 MB) zero-wait-state SRAM and shares an additional 256Kx32 (1MB) common SRAM.
Ariel`s HyperHydra V100 VME64 board has either four or eight TI 50/60-MHz TMS320C44 floating-point DSPs for as much performance as 480 megaflops. The board provides as many as 12 external 2-megabyte-per-second communications ports, two open-IO expansion sites, and a JTAG port.
CSPI`s MAP-2610 VME board has a single 200 MHz PowerPC with 256KB L2 cache, 5 megabyte flash, and as much as 64 megabyte DRAM, and 400 megaflops per second. A PCI-bridge chipset provides a VME-to-PCI bus link. The MAP-SW-10 switch board implements five system area network microstrip AMP connectors on the Front Panel and one optional VME P-zero backplane connector.
TMS320C6x prepares to face off with SHARC
The Analog Devices SHARC will be getting new competition later in the year from the Texas Instruments new 200 MHz/1600 MIPS TMS320C6x fixed-point DSP. Advanced releases of the initial C6021 version are already available and use an advanced VLIW architecture that incorporates eight functional units (two multipliers and six ALUs) surrounded with one megabit of on-chip RAM.
Henry Wiechman, the C6x product marketing manager, says TI is not yet commenting publicly on the anticipated follow-on floating-point version of the C6x, other than to say "we`ve had a lot of interest from board-level manufacturers and are working on some things in the floating point arena." In the meantime, however, the fixed-point device already offers a challenge to the SHARC, which is itself frequently implemented in fixed-point, 32-bit integer mode.
Although the C6021 has 16-by-16-bit multipliers vs. SHARC`s 32 by 32, Wiechman points out that there are two units on the device, and although the SHARC has 10 direct memory access (DMA) channels vs. two on advanced release C6201s, Wiechman says production versions will have four DMA channels, each of which will have split-mode capability that "when combined with the device`s glueless synchronous memory interface to synchronous DRAM and pipelined SRAM, will allow the CPU to run at maximum clock rates."
Although the C6201 has two serial ports and no link ports, Wiechman says the serial ports on the production-release device will be multichannel serial ports capable of interfacing to T1/E1 communication trunks and support the MVIP standard for TDMA which gives the chip a capability to support multiprocessing.
Although a much faster device, the C6x will not be code- or pin-compatible with the C40 family which is a concern for some developers. The C6x was designed instead to be a superior C-code engine that, together with its 1600 MIPS performance, will enable users to develop their DSP applications in a high-level language, Wiechman says, adding that this will reduce development time for high-performance DSP applications by as much as 50 percent.
From the board maker`s perspective, Ariel`s Curtin says he believes the C6x will be a big player in the military and aerospace electronics market. "It`s a 10x performance upgrade at the chip level which means a multi-processor 500 megaflops VME board can be reproduced with one processor." Curtin also favorably views TI`s next-generation software- development suite including its compiler and emulator tools.
Ariel officials expect to get samples of the C6021 soon and will announce a VME product this year based on the device. "At a bare minimum it will be VME-64, but we`re also looking at the new 320 megabits- per-second VME extension," Curtin says. The board will feature Ariel`s own "Open-Hardware Architecture" link providing access to key DSP signal lines as well as use open I/O mezzanine modules for migration of current SHARC I/O products.
Curtin says he believes Ariel leaders will introduce a comparable-performance floating point product later this year, although they haven`t gotten a firm commitment from TI on the availability of a floating-point C6x device.
Spectrum`s Harfman also sees a lot of interest in the C6x particularly for communications-related and surveillance applications. Spectrum officials have a multi-processor C6x VME-based product planned for later this fall that will "combine the floating point capability of the PowerPC with the high MIPS performance of the C6021." Harfman points out that future-generation products will not need the PowerPC for enhanced floating point operation when a floating-point version of the C6x becomes available.
CSPI`s Pelon observes that the C6021 offers a significant step forward in clock rate and instruction size for general- purpose fixed-point devices - capabilities which designers haven`t had before. "Experience shows people will try to use what`s available and we may see some new approaches to fixed-point implementations," Pelon says, adding, however, that "military and aerospace electronics designers still prefer floating point and if they can do everything with floating point they will."
Although Alacron designers do not use TI`s C40 in their current products, company CEO Joseph Sgro says they are also looking at the C6x. He adds however, that there are many options and "I`m not yet convinced that it`s clearly the best fixed-point processor coming out in the next year." Likewise Transtech`s Stevens says his engineers have also looked at the C6x, but "right now, we don`t feel the fixed-point device has adequate interprocessor communication facilities. We are, however, closely monitoring development of the floating point version."
Meanwhile, Analog Devices officials believe their existing SHARC products will remain competitive with the C6x, at least the fixed-point devices. In addition, however, they also have two new generations of DSPs in design. "Generation II", which will be coming out in 1998 will offer "a major performance boost," May says, and will also be code- compatible with existing SHARC products. The new product will be offered in a BGA package at 3.3V. A follow-on "new-architecture", generation III product is also in design and will be introduced in 1999.
The first product in Alacron`s Dominator series is a scaleable array of as many as eight SHARC DSPs interconnected via dual-ported local memory. A Pentium P5 processor handles operating system functions.