New factorized power architecture promises military advantages

March 1, 2004
Military vehicles with electrical and electronic systems that use various high and low voltages can benefit from the high density, high efficiency, and low electrical noise of V-I Chips

Military vehicles with electrical and electronic systems that use various high and low voltages can benefit from the high density, high efficiency, and low electrical noise of V-I Chips

by Andrew Hilbert

For many years after World War II the private sector was arguably more often the beneficiary of military technological advances than the other way around. That began to change perhaps 20 years ago. By 1994, when the commercial off-the-shelf (COTS) doctrine was mandated, the military began to apply advances from the commercial world: PCs, software, communications, the Internet.

The arrangement is not always a happy one, however. Commercial values do not always work for the military's benefit; short product life cycles, to give one example, usually conflict with military resupply policies.

The recent introduction of factorized power architecture (FPA) may be one significant win-win exception for the military. V-I Chips, the enabling power devices for the architecture, are small and lightweight, making them attractive for airborne and aerospace applications. High efficiency, low parts count, and molded packaging enable V-I Chips to prosper in the harsh environments endemic in military applications.

Conventional modular DC-DC converters bundle the three classic converter functions — isolation, transformation, and regulation — into each brick. When they function within the distributed power architecture (DPA) paradigm this repeated functionality becomes added cost, size, and weight.

The intermediate bus architecture (IBA) separates this functionality, placing isolation within an intermediate bus converter (IBC) and regulation and voltage step-down within a non-isolated point-of-load (niPOL) converter. NiPOLs, then, forego isolation and high ratio voltage transformation to improve cost effectiveness. But they depend upon the nearby bus converter to supply power at an intermediate voltage, exposing overvoltage-sensitive loads to potentially deadly faults.

Factorized power architecture also separates the conventional converter functionality into two power building blocks, yet that is where the similarity ends. This new architecture overcomes all of the shortcomings of DPA and IBA.

FPA, in concert with IC-style chipdevices, provides power-system designers with higher performance — in terms of system flexibility, power density, conversion efficiency, transient responsiveness, noise performance, and field reliability — at a lower cost than that attained by any other architecture.

Power conversion components called V-I Chips enable FPA. V-I Chips efficiently process more than 200 watts of power in a power ball grid array (BGA) package that is smaller than 0.25 cubic inch, and lighter than 13 grams. Furthermore, the V-I Chip has power densities of more than 800 watts per square inch. These functional building blocks deploy as surface-mount components to create a flexible factorized power system.

One building block, the preregulator module (PRM), is designed to accept a wide-range supply voltage and convert it to a controlled voltage source with 97 to 99 percent efficiency. Another building block, the voltage transformation module (VTM), converts the Factorized Bus to the voltage levels of the load with efficiencies as high as 97 percent.

The VTM will also provide input to output galvanic isolation. By separating the PRM from the VTM, a source of heat may be removed from the point of load and higher power density can be achieved at the point of load with easy-to-manufacture, cost-effective components. With an effective switching frequency of 3.5 MHz, the VTM responds to dynamic loads 20 times faster than the fastest brick-type converter.

FPA and V-I Chips give the power designer the flexibility to use only what he needs where he needs it. The minimal complement of PRMs and VTMs depends on the many different outputs, power levels, individual regulation, and power-system fault-tolerance requirements. VTM and PRM VI Chips can be paralleled with accurate sharing for relatively low power consumption or redundancy; in fact, VTMs inherently current share when inputs and outputs are paralleled. This avoids the need for a power-sharing protocol, interface signals, and many remote sense connections.

By exploiting a zero-voltage switching and zero-current switching topology, the VTMs limit the common-mode and differential-mode noise at the point of load. For example, the output of a VTM configured to convert 48 volts to 12 volts exhibits about 12 millivolts peak-to-peak of high-frequency ripple with just one microfarad of bypass capacitance. That noise voltage amounts to only 0.1 percent of the DC output. This performance exceeds that of any low-noise brick.

In a comparison of a typical 200-watt/60-amp quarter brick and a 240-watt/100-amp V-I Chip, the brick is about 3.3 square inches and about 1.65 cubic inches, while the area of the chip is about one square inch — less than one-third of the quarter brick. The volume of the chip is about one quarter of a cubic inch. Designers can mount the chip on the board, in the board, or vertically like a single-in-line package (SIP). The power density of the quarter brick is about 91 watts per cubic inch, while the inboard mounted VI Chip is almost 1200 watts per cubic inch, about 800 onboard.

Because of the inherent flexibility of factorized power and superior performance of V-I Chips, a wide variety of military systems and applications could benefit from their deployment.

For example, systems with advanced, high-speed microprocessors requiring on-board power at high current and low voltage can draw as much as 80 amperes at as much as 2.5 volts from one VTM. The VTM's ability to respond to changes in microprocessor current in less than one microsecond outperforms typical sub-MHz, hard-switching, multiphase VRMs, while at the same time reducing system complexity and cost. V-I Chips are priced as low as 25 cents per watt in small quantities.

Electrical and electronic systems in military vehicles requiring a multiplicity of high and low voltages can benefit from the high density, high efficiency, and low electrical noise of V-I Chips. Rated for full load operation at 125 degrees Celsius with a variety of thermal-management options, the inherent ruggedness of V-I Chips should provide compatibility with harsh-application environments. MIL-HDBK-217F calculated MTBF is more than 3.5 million hours.

Andrew Hilbert is senior director of product marketing at power supply designer Vicor Corp. in Andover, Mass

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