SANTA CLARA, Calif., 30 Jan. 2014. Agilent Technologies Inc. in Santa Clara, Calif., is introducing the U7231B-3NL DDR3 and LPDDR3 debug tool to help DDR memory designers perform precompliance tests, discover the root cause of compliance failures, and make the most of design margins.
The tool includes statistical analysis on DDR3 and LPDDR3 timing measurements per the JEDEC standard as well as markers to indicate measurement points. The U7231B-3NL DDR3 and LPDDR3 debug tool works on saved waveform files from Agilent oscilloscopes.
The tool locates the start and end of read and write bursts found in the trace to enable quick timing measurements. Engineers then can navigate to problem areas to perform further analysis and margin tests.
For more information contact Agilent online at www.agilent.com.
Agilent Technologies accelerates defense simulations, harnesses compute clusters for fast system-level validation and test
Agilent offers test improvements to MXG and EXG X-series vector signal generators
Agilent spins off electronic test and measurement businesses into new company named Keysight Technologies.