Debug tool to help DDR memory designers with precompliance testing introduced by Agilent

SANTA CLARA, Calif., 30 Jan. 2014. Agilent Technologies Inc. in Santa Clara, Calif., is introducing the U7231B-3NL DDR3 and LPDDR3 debug tool to help DDR memory designers perform precompliance tests, discover the root cause of compliance failures, and make the most of design margins.

Jan 30th, 2014
Content Dam Mae Online Articles 2014 01 Agilent 30 Jan 2014

SANTA CLARA, Calif., 30 Jan. 2014. Agilent Technologies Inc. in Santa Clara, Calif., is introducing the U7231B-3NL DDR3 and LPDDR3 debug tool to help DDR memory designers perform precompliance tests, discover the root cause of compliance failures, and make the most of design margins.

The test & measurement tool enables designers to navigate to areas of interest for further analysis and collect and analyze statistical data. The DDR3 and LPDDR3 debug tool runs on Infiniium 9000A, 90000A, 90000 X-, and 90000 Q-Series oscilloscopes.

The tool includes statistical analysis on DDR3 and LPDDR3 timing measurements per the JEDEC standard as well as markers to indicate measurement points. The U7231B-3NL DDR3 and LPDDR3 debug tool works on saved waveform files from Agilent oscilloscopes.

The tool locates the start and end of read and write bursts found in the trace to enable quick timing measurements. Engineers then can navigate to problem areas to perform further analysis and margin tests.

For more information contact Agilent online at www.agilent.com.

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