Support for two aerospace and defense field-programmable gate arrays (FPGAs) introduced by Microchip

Jan. 31, 2019
CHANDLER, Ariz. – Microchip Technology Inc. (formerly Microsemi) in Chandler, Ariz., is introducing support for two aerospace and defense field-programmable gate arrays (FPGAs) -- the low-power, radiation-tolerant RT4G150L FPGA, which offers 25 percent savings for standard speed grade; and military-grade support for the SmartFusion2 M2S150T/S FCV484 FPGA.

CHANDLER, Ariz. – Microchip Technology Inc. (formerly Microsemi) in Chandler, Ariz., is introducing support for two aerospace and defense field-programmable gate arrays (FPGAs) -- the low-power, radiation-tolerant RT4G150L FPGA, which offers 25 percent savings for standard speed grade; and military-grade support for the SmartFusion2 M2S150T/S FCV484 FPGA.

At the same time, Microchip is releasing the Libero system-on-chip (SoC) version 12.0, the PolarFire MPF100T, PolarFire MPF200T, and PolarFire MPF300T FPGAs, including production timing and power for PolarFire MPF300T-1.

The Libero SoC v12.0 FPGAs are designed to reduce runtime, place-and-route, and power consumption. Designers will see runtime reduction of 60 percent for timing, 25 percent for place and route, and 18 percent for power results.

They will also see an average increase of four percent in quality of results for larger designs and a 10 percent improvement for the PolarFire MPF300/TS-1 device, Microchip officials say.

This can help deliver gains in runtime and quality of results, as well as one unified design suite for all the company's latest-generation FPGA families.

Related: Radiation-hardened microcontroller for space satellites introduced by Microchip Technology

One unified design suite for PolarFire, IGLOO2, SmartFusion2, and RTG4 FPGAs eliminates the need for designers to qualify several pieces of software when working across product families.

Libero SoC v12.0 supports FPGA Hardware Breakpoint (FHB) for RTG4 and PolarFire devices, PCI Express debug support for PolarFire, and continuous transceiver eye monitoring using SmartDebug.

The release also improves double-date-rate (DDR) memory performance by an average of 29 percent in high-effort mode and 39 percent in regular-effort mode. Enhanced Tool Command Language (TCL) support enables designers to run the design flow on the command line.

For more information contact Microchip Technology online at www.microchip.com.

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