AMBLER, Pa., 19 Feb. 2007. MEN Micro Inc. in Ambler, Pa., is introducing development packages for M-Modules and PCI Mezzanine Cards (PMCs) that transform specialized I/O requirements into a series of standard products.
The Universal Submodule (USMT) concept implements a board's desired functionality through one or more IP cores in an FPGA, forging a generation of M-Modules and PMCs with individual functionality and exceptional flexibility, reducing design time and cost. MEN Micro's USM concept is for applications in test, measurement, simulation, and control automation.
The USM plugs into the respective base mezzanine, allowing functionality to change at any time through the implementation of different IP cores. The corresponding line drivers are located on the USM, while its Nios soft core processor is implemented on an Altera Cyclone II FPGA to provide local intelligence where needed. I/O signals are routed through a front-end SCSI connector.
For added flexibility, the same USM may be used on M-Modules, PMC modules, XMCs and conduction-cooled PMC modules. Product development is limited to the USM module and the FPGA content, significantly speeding time to market. The USM concept also protects against component obsolescence, since the mezzanine lifecycle no longer depends upon commercially available components. IP cores can be imported into a newer FPGA and tailored to current needs.
The USM development kit for M-Modules or PMC modules enables rapid development of users-specific I/O. The kit includes a base M-Module (M199 equipped with an FPGA, 32 megabytes DRAM and 8 megabytes Flash) or a base PMC module (P599 equipped with an FPGA, 32 megabytes DRAM and 2 megabytes Flash). The kit also provides a wire-wrapped USM plug-in module; a test board that receives I/O signals from the FPGA and that enables the implementation of a debug interface for the Nios processor; as well as a SCSI cable to connect the base module and test board.
The kit's included FPGA package is composed of the Nios processor, memory control and bridges that connect the PMC or M-Module to the Avalon/Wishbone buses. For the development of IP cores on the standard Wishbone bus, the Wishbone Bus Maker tool from MEN Micro is included. For the Avalon bus, Altera's Quartus II design environment including the SOPC builder is required to use the Nios cores and to develop IP cores.
Both M-Module and PMC base boards and the USM plug-in modules are designed for an operating temperature of -40 to 85 degrees Celsius. To meet demands for increased shock and vibration resistance, the boards are equipped with soldered components and sturdy connectors. For more information contact MEN Micro online at www.menmicro.com.