Northrop Grumman, Cadence, and Freescale team on a new generation of rad-hard ASICs for radiation protection in space

Aug. 4, 2010
REDONDO BEACH, Calif., 4 Aug. 2010. The Northrop Grumman Corp. Aerospace Systems sector in Redondo Beach, Calif., is teaming with integrated circuit specialists Cadence Design Systems in San Jose, Calif. and Freescale Semiconductor in Austin, Texas, to create rad-hard application-specific integrated circuits (ASICs) for military and space applications. Northrop Grumman (NYSE:NOC) is offering a radiation-hardened by design, 90 nanometer, silicon on insulator (RHBD 90nm SOI) standard cell and intellectual property library with intellectual property for custom ASIC development.

REDONDO BEACH, Calif., 4 Aug. 2010. The Northrop Grumman Corp. Aerospace Systems sector in Redondo Beach, Calif., is teaming with integrated circuit specialists Cadence Design Systems in San Jose, Calif. and Freescale Semiconductor in Austin, Texas, to create rad-hardapplication-specific integrated circuits (ASICs) for military and space applications.

Northrop Grumman (NYSE:NOC) is offering a radiation-hardened by design, 90 nanometer, silicon on insulator (RHBD 90nm SOI) standard cell and intellectual property library for custom ASIC development that includes 340 1-volt standard cell gates; 3.125 gigabit-per-second serializer/deserializer; phase-locked loop; static random access memory compiler; and 1.8- and 2.5-volt input/output buffers.

Radiation hardened by design is a way of making electronic components and systems with radiation protection from damage or malfunctions by ionizing or particle radiation, as well as from radiation exposure to high-energy electromagnetic space radiation. Silicon on insulator is a high-performance semiconductor wafer technology that produces lower-power and higher performance devices for use in a radiation environment like space than traditional bulk silicon techniques, Northrop Grumman officials say.

"This next-generation of application-specific integrated circuit technology allows a higher level of integration, lower power and faster speeds," says Stuart Linsky, vice president of satellite communications at Northrop Grumman Aerospace. "This cell library enables users to design large radiation hardened ASICs in a low-power, high-performance semiconductor process for space applications."

Northrop Grumman and Cadence developed the library with radiation hardening by design techniques. Using a commercial SOI foundry at Freescale Semiconductor in Austin, Texas, experts fabricated several test chips, including a 5-million-gate ASIC. All were tested to validate the library's suitability for space applications.

For more information contact Northrop Grumman Aerospace online at www.as.northropgrumman.com, Cadence at www.cadence.com or Freescale Semiconductor at www.freescale.com.

About the Author

John Keller | Editor

John Keller is editor-in-chief of Military & Aerospace Electronics magazine, which provides extensive coverage and analysis of enabling electronic and optoelectronic technologies in military, space, and commercial aviation applications. A member of the Military & Aerospace Electronics staff since the magazine's founding in 1989, Mr. Keller took over as chief editor in 1995.

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