Behind the times

Jan. 21, 2019

Today, we announced that we’re working on an exciting project that could transform the development of sophisticated embedded computing applications. You can find the announcement here.

Computing hardware technology has evolved tremendously in the 26 years I have been working in the electronics industry. High Performance Embedded Computing solutions in the 90s required large, multi-processor, parallel computer systems to solve complex signal and image processing problems. These computer systems tended to have homogenous architectures – i.e. they used multiple processing elements of the same type with a symmetrical interconnect topology. DSPs such as TI’s C40 and AD’s SHARC were classic examples.

This was then superseded by more mainstream clusters of PowerPC and Intel CPUs that could be networked together to solve the same problem. New software standards for communication between processing elements, such as MPI (Message Passing Interface), evolved to support these architectures and enable developers to create high performance, scalable and portable applications to run on these platforms.

New technologies

In the last 10 years, however, new technologies such as multi-core CPUs, GPUs and FPGAs have provided orders of magnitude more processing power enabling these complex signal and image processing problems to be solved in a much smaller footprint, with a lower number of devices. A heterogeneous system architecture combining a modern FPGA, multi-core CPU and high-end GPU can now potentially replace a system that had over 50 PowerPC processors.

Also: “system-on-chip” (SoC) technology can put all three of these processing elements on one piece of silicon! As well as the traditional HPEC and HPC application areas, these new heterogeneous architectures are now deployed in an ever-expanding set of consumer and industrial applications such as virtual and augmented reality, IoT/cloud computing, medical devices, robots and autonomous vehicles.

However: there is a problem. The traditional programming models and open standards for communications between processing elements have been left behind somewhat. The interconnect topologies have become more complex and fragmented. No longer is there a clear, unified communication standard that is suitable for all the new interfaces introduced by these heterogeneous architectures. The diagram below shows all the software interfaces available for a developer needing to communicate between compute elements in such a system.

Overwhelming, isn’t it?

How do you decide which one to use? No single interface covers all the communication paths, so you need more than one interface. You want the highest performance interfaces - but they may be complex to code. You also need portability and scalability as you know the hardware may change in nine months. The bottom line is: there isn’t one that fits.

Wouldn’t this be better?

An API that provides a unified solution will greatly simplify the application developer’s problem.

Call for a new standard

At Abaco, we felt no existing open standard API provided this unified solution. Bear in mind that most existing standards were developed before the evolution of these heterogenous architectures. We presented our case to the open standard experts, Khronos (keepers of standards such as OpenGL, OpenCL, OpenVX, Vulkan, etc.) and proposed a new standard API called Takyon.

Khronos listened and created the “Heterogeneous Communications” Exploratory Group with a goal to gather industry support for development of a new standard and solicit additional proposals. You can take a look and contribute here.

Takyon to the rescue

Abaco’s new Takyon API aims to provide this unified solution. Takyon provides a simple, but hugely powerful, API for communications.

Even better, Abaco has created an open source reference implementation of the Takyon API, which can be downloaded and utilized today – give it a try here.

Having established the Exploratory Group, and solicited inputs from the industry, the Khronos Group now needs to see its process through. We’re very hopeful that, once it has taken on board the inputs and needs of industry stakeholders, Takyon will emerge as the preferred contender.

About the Author

David Tetley | Engineering Manager

David is engineering manager of Abaco Systems' HPEC Center of Excellence in Boston, responsible for both the AXIS software suite and HPEC system development. He has a background in military signal and image processing, starting his career as a scientific officer for the UK Ministry of Defence working with lasers and missile seeker technology, and then moving into software development in the days of the Texas instruments C40 and Analog Devices Sharc processors. As engineering manager in Boston, he has led the development of the AXIS software suite and helped shape Abaco’s HPEC strategy.

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