3D packaging technologies evolve in response to miniaturization
PALO ALTO, Calif., 25 April 2008. Three-dimensional (3D) packaging is expected to emerge as a dominant performing solution in the electronic/chip packaging industry, says a new study from Frost & Sullivan. The analysis finds that 3D packaging technology will be key in catering to the ever-increasing miniaturization demands from application sectors. The electronic/chip packaging industry has started exploring various forms of system in package-based solutions.
PALO ALTO, Calif., 25 April 2008. Three-dimensional (3D) packaging is expected to emerge as a dominant performing solution in the electronic/chip packaging industry, says a new study from Frost & Sullivan.
The analysis, "Global Trends in Electronic/Chip Packaging," finds that 3D packaging technology will be key in catering to the ever-increasing miniaturization demands from application sectors that include consumer electronics and a wide range of high-speed memory devices. Looking beyond successful solutions such as system on chip (SoC), the electronic/chip packaging industry has steadily started exploring various forms of system in package (SiP)-based solutions.
Currently, the industry focuses on interconnect technologies, signal integrity issues, and manufacturing capabilities. Resolving all challenges with regards to 3D system design remains very important to drive this technology efficiently across the supply chain.
"Advances in the field of packaging technologies are taking the package closer to the bottom-line wafer," notes Frost & Sullivan Technical Insights research analyst Krishnakumar Srinivasan. "A close look into the latest packaging solutions such as 3D packaging will show that packaging technologies have advanced to such an extent that they share a dominant role in maintaining advances in the semiconductor industry along the Moore curve."
The demands of the consumer electronics industry remains the most influential driver for technological advances in the semiconductor industry. Moore's curve identifies growth patterns in the electronics industry and any indication that further development along this curve would be difficult, but would spur innovation in the industry. Electronic packaging increasingly supports miniaturization. All along the growth curve of packaging technologies, the packaging module has subtly moved a step closer to the wafer. With advances in technologies such as SiP, SoC, and Wafer Level Packaging (WLP), the package and wafer have become merged entities of an integrated chip.
"Global Trends in Electronic/Chip Packaging," a part of the Technical Insights program, provides a technology overview and outlook for electronic/chip packaging. The study covers some of the latest trends in emerging packaging technologies with a focus on 3D Packaging. Furthermore, this research service includes detailed technology analysis and industry trends evaluated following extensive interviews with market participants. Interviews with the press are available.