MOUNTAIN VIEW, Calif., 7 Aug. 2007. Actel Corporation's radiation-tolerant RTAX-S field-programmable gate arrays (FPGAs) are aboard NASA's Phoenix mission to Mars, which launched August 4 from Cape Canaveral Air Force Station in Florida. The Phoenix spacecraft includes a Meteorological Station (MET), provided by the Canadian Space Agency. MDA, a provider of robotic space systems, led construction of the MET instrument and has integrated Actel's one-million gate RTAX1000S-CQ352 device into the instrument subsystem, which is used to acquire, process, and transmit temperature and pressure data to scientists and researchers back on Earth.
Says Andrew Kerr, program manager for the MET program at MDA, "We determined that the RTAX1000S-CQ352 provided the high reliability and stringent low-power metrics required for this mission-essential function. Using the high-density RTAX-S Actel device, MDA's MET instrument temperature and pressure subsystem is designed to provide accurate data throughout the mission, without failures."
The Phoenix spacecraft includes the MET built by MDA, which will record the daily weather of the Martian northern plains using temperature and pressure sensors. Once the Phoenix arrives on Mars, the MET instruments will be used constantly in surface operations, which are expected to last 150 days. These instruments are central to scientific exploration on Mars, providing the essential tools scientists need to learn more about the Martian climate and geology, as well
as determine whether life has ever existed.
The MET instruments operate on a combination of battery power and solar energy. Because sunlight in the Martian polar region is even weaker than at its equator, all systems and their components must feature efficient power management.
The Actel radiation-tolerant RTAX-S FPGA family consists of devices ranging in density from 250,000 to 4 million equivalent system gates. The family, which includes the RTAX1000S used in the Phoenix mission's flight, offers features desirable for space-flight applications, including single-event upset (SEU)-hardened flip-flops, usable error-corrected on-board memory, and a large number of user I/O.
