A design or component engineer responsible for extending the lifetime of a military or aerospace electronics system is inevitably confronted with the rapid evolution of electronic components. Typically, the engineer is responsible for an electronics system in which one or more of the components is no longer manufactured and is unavailable from original sources.
Although obsolescence issues have ruptured the supply chain, functionality demands are largely intact. The precise functions necessary for the power assembly, actuator control, system sensor, voltage regulator, receiver and radar module, or inertial navigation system — to name a few possibilities — remain unaltered. Still, the rapid evolution in component and materials technology, along with constantly shifting manufacturing capabilities, have made one or more of the key original components impossible to obtain.
Ideally, the most straightforward way to solve the problem of unavailable obsolete components would be to redesign the entire system. In the real world, however, complete system redesign is seldom feasible, especially since the actual cost of redesign can easily be 10 times the cost of other approaches. In addition, redesign projects typically take months or longer to complete and time requirements for the availability of the system may preclude this approach. There is also the temptation — as long as the system is being redesigned — to add extra bits of functionality, and perhaps hardware changes, that delay system availability even longer.
Any system under consideration for upgrade has one vital characteristic: it has already proven its reliability over a long period of time, even though it contains obsolete components. Thus, there is obvious value in replacing only the obsolete components and keeping the system as intact as possible. This kind of system has already passed a "life test" that is far more rigorous than any accelerated test.
The engineer, if at all possible, wants to avoid repeating the qualification process because the testing involved is tedious, expensive, and time-consuming. The engineer would rather focus on the few components in question to replicate the form, fit, and function of those obsolete components, while leaving the rest of the system intact. Depending on the characteristics and history of the system, the engineer has several options that can help control the nonrecurring engineering (NRE) costs of the upgrade.
In some cases diligent searching may locate a component that appears to have the same functionality as the obsolete component. The engineer may find an "alternative" — a component that has higher specifications but is capable of delivering the same functionality. Or he may locate a "substitute," a potential replacement that has lower specifications than the original but that may still function adequately. Systems designers should approach such drop-in replacements with caution. Many are from unknown sources, and have no traceability. Such "gray-market" components are also likely to vary in reliability and even in package design from lot to lot. Reliability concerns alone may make it more prudent to take a different route.
In his first evaluation of the system, the engineer will look closely at the manufacturing history of the system through available records. There may be no available "last-time buy" wafers for a particular component, but the component's design data may have been stored on tape. By the use of data readers from periods as early as the 1970s, engineers can read data stored on tape and generate a netlist for an orphaned component. The engineer then can use the netlist to design an application-specific integrated circuit (ASIC), field-programmable gate array (FPGA), uncommitted logic array (ULA), or other current-use IC to replicate the functionality of an obsolete component.
The original fabrication plant may have closed or the company restructured so that design data for the component no longer exists. Even this situation is not hopeless; by close inspection of existing known good die (KGD), users may recover the netlist and program it into another IC format.
In most cases, such extreme measures are not necessary because adequate data is readily available, and more modern technologies can help solve the problem. For device replication (emulation) using ASIC technologies, redesign from a netlist, test vectors, and KGD is relatively straightforward.
The use of ASICs is generally attractive for replacement demands of more than 1,000 units or for parts in which analogue/mixed-signal functionality is required. In other situations, the engineer will use some type of hybrid redesign to replicate the original component. The engineer will typically use various hybrid elements — chip and wire hybrids, MCMs, chip stacking, and customized FPGAs — to create the redesign that matches the size, functionality, and I/O footprint of the original component.
Consider, for example, the 40-pin dual in-line package (DIP) that was widely used during the 1980s. Such an IC probably has from 10,000 to 20,000 active elements, or about one-thousandth the number of elements on a modern chip of the same size. The 40-pin DIP measured 2.1 inches long and 0.6 inches wide — enormous by today's standards.
As old-fashioned as the DIP appears today, it performed all of the required functions. Today, a much smaller chip capable of performing similar functions would replace it. The smaller chip would probably run at a lower voltage than the DIP, so a voltage regulator would be incorporated into the form-fitting package. The higher-speed performance of the smaller-geometry chip might cause interference problems when operating at the lower speeds of the older system in which it will be installed, but capacitive decoupling could solve this problem.
When the upgrade design is completed, the smaller replacement chip — along with the capacitors, resistors, and other components — fits within the form of the DIP, perform the same functions, and have the same I/O pattern. Such a relatively inexpensive replacement for the obsolete DIP can usually be designed and assembled fairly quickly.
The capacity of today's FPGA and similar programmable chips is so great that systems designers may find it possible to program the netlists from three or more subsystems onto the array.
In missile systems, for example, an engineer is likely to encounter a board on which chip capacitors, PC board, resistors, and connectors are all intact and still available, while the three or four ICs on the board are obsolete. Programming the netlists for all of the ICs onto one FPGA reduces the overall nonrecurring engineering (NRE) charges, which will now be amortized on one device.
Although this option can save space, designers who seek an exact form, fit, and function replacement to avoid requalification costs may want to consider some FPGAs in bare-chip form and then assemble them into a package with the same performance and dimensions as the original. This method can simplify future rebuilds of the system because the package tooling is likely to remain available (or can be reproduced) and the different FPGAs can be inserted as the updated versions of FPGAs become available.
A problem that sometimes occurs involves the replacement chip, which may have different I/O pad layouts that differ from those of the original IC, making the package pinouts difficult. This problem can be solved by placing an interconnect substrate under the die; die thinning may be needed to maintain vertical form. The designer could incorporate this interconnect into the ceramic package design.
If the replacement chip is an FPGA, the substrate is typically a ceramic circuit with thick-film conductor tracks. Wire bonds link the chip, the connection pads on the substrate, and the package leadthroughs. After the chip is programed, the wire-bond interconnects are removed and replaced with wire-bond connections for service use.
If vertical space is limited, a stacked-chip configuration can be used. Various types of stacked chips already have a substantial history and can achieve the long-term reliability necessary for military applications. Often a stacked chip is used to add memory to the otherwise unchanged functionality of the IC. The stacked chip will achieve a vertical dimension that fits the original package cavity, so stacking is far less expensive than redesign if wafers with the original chips are held in stock.
Steve Riches is business development manager at Micro Circuit Engineering in Tewkesbury, England. Readers can reach him by e-mail at [email protected], or online at www.micro-circuit.com.