Air Force surveys industry for trusted computing, anti-tamper enabling technologies in embedded computing

Dec. 9, 2019
Of specific interest are anti-tamper technologies for secure COTS FPGAs; secure microcontrollers; volume protection within secure COTS architectures.

WRIGHT-PATTERSON AFB, Ohio – U.S. Air Force researchers are asking industry to mature anti-tamper enabling technologies that protect weapon systems from exploitation, reverse engineering (RE), technology transfer, and countermeasures development.

Of specific interest are anti-tamper technologies for secure commercial off-the-shelf (COTS) field-programmable gate arrays (FPGAs); secure COTS critical program information (CPI) processing; anti-tamper secure microcontroller; and volume protection within secure COTS architectures.

Officials of the Air Force Life Cycle Management Center Anti-Tamper Executive Agent Program Office at Wright-Patterson Air Force Base, Ohio, issued a broad agency announcement last week (BAA-AFLCMC_XZZ-2016-0001_Call_4) for the fourth call in the organization's trusted-computing Technology Development BAA.

Researchers want to bring anti-tamper technologies in these four areas at least to component validation in a laboratory environment (Technology Readiness Level 4).

Related: COTS-based trusted computing: getting started in next-generation mission-critical electronics

For now, researchers are asking industry for six-page white papers that describe architectures that integrates or develops components, with separate two-page papers that describe extensions of security (EoS) that functions as a foundation to the overall white paper.

A basic EoS concept involves security architecture that provides a secure boot with a secure device, often referred to as a root of security (RoS) that verifies and extends security to a second device responsible for CPI processing.

Secure COTS FPGA enabling technologies should enable secure FPGA software that resides on programmable hardware to protect CPI at rest and during run time from known exploitation techniques.

Secure COTS CPI processing should prevent the exploitation of CPI from systems assembled from high-performance COTS parts. The secure COTS architectures will be compatible with defense industry open-architecture design methods to enable upgrades of unsecure systems to more secure versions.

Related: Navy asks industry for information technologies for defending aerial weapons against enemy cyberattacks

Anti-tamper secure microcontroller technologies should establish and extend roots of trust, and will be compatible with defense industry open-architecture design methods to enable upgrades of unsecure systems to more secure versions.

Volume protection within secure COTS architectures involves technologies to enable volume protection of CPI storage and processing components and software in COTS hardware architectures that can withstand repeated attempts to access CPI and protect CPI during all stages of operation.

A secure annex with information at the secret and collateral level is available on request by email at [email protected]. Researchers say they expect to award several contracts worth a cumulative value of about $5 million.

Related: Lowering the costs of encrypted data storage in trusted computing

Companies interested should submit white papers no later than 15 Jan. 2020 in hard copy and electronic copy formats by post or courier to 2275 D St., Building 16, Room 52, Wright-Patterson AFB, OH 45433. Those submitting promising white papers will be asked to submit formal proposals.

Email questions or concerns to [email protected]. More information is online at

About the Author

John Keller | Editor-in-Chief

John Keller is the Editor-in-Chief, Military & Aerospace Electronics Magazine--provides extensive coverage and analysis of enabling electronics and optoelectronic technologies in military, space and commercial aviation applications. John has been a member of the Military & Aerospace Electronics staff since 1989 and chief editor since 1995.

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